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Parallel programming is emerging fast and intensive applications need more resources, so there is a huge demand for on-chip multiprocessors. Accessing L1 caches beside the cores are the fastest after registers but the size of private caches…

Performance · Computer Science 2016-09-27 Diman Zad Tootaghaj , Farshid Farhat

Multi-threaded applications are capable of exploiting the full potential of many-core systems. However, Network-on-Chip (NoC) based inter-core communication in many-core systems is responsible for 60-75% of the miss latency experienced by…

Hardware Architecture · Computer Science 2021-01-05 Abhijit Das , John Jose , Prabhat Mishra

The exponential increase in Machine Learning (ML) model size and complexity has driven unprecedented demand for high-performance acceleration systems. As technology scaling enables the integration of thousands of computing elements onto a…

Hardware Architecture · Computer Science 2026-05-13 Luca Colagrande , Lorenzo Leone , Chen Wu , Tim Fischer , Raphael Roth , Luca Benini

Many computer systems for calculating the proper organization of memory are among the most critical issues. Using a tier cache memory (along with branching prediction) is an effective means of increasing modern multi-core processors'…

Networking and Internet Architecture · Computer Science 2021-05-21 Mohamed A. Hamada , Abdelrahman Abdallah

Analog In-Memory Computing (AIMC) is emerging as a disruptive paradigm for heterogeneous computing, potentially delivering orders of magnitude better peak performance and efficiency over traditional digital signal processing architectures…

Three-Dimensional Networks-on-Chips (3D-NoCs) have been proposed as an auspicious solution, merging the high parallelism of the Network-on-Chip (NoC) paradigm with the high-performance and low-power cost of 3D-ICs. However, as technology…

Hardware Architecture · Computer Science 2020-03-24 Khanh N Dang , Michael Meyer , Yuichi Okuyama , Abderazek Ben Abdallah

Memory-centric computing aims to enable computation capability in and near all places where data is generated and stored. As such, it can greatly reduce the large negative performance and energy impact of data access and data movement, by…

Hardware Architecture · Computer Science 2023-09-15 Onur Mutlu

Network-on-Chip (NoC) has become a popular choice for connecting a large number of processing cores in chip multiprocessor design. In a conventional NoC design, most of the area in the router is occupied by the buffers and the crossbar…

Hardware Architecture · Computer Science 2020-07-07 Wo-Tak Wu

With emerging storage-class memory (SCM) nearing commercialization, there is evidence that it will deliver the much-anticipated high density and access latencies within only a few factors of DRAM. Nevertheless, the latency-sensitive nature…

Three-dimensional integrated circuits promise power, performance, and footprint gains compared to their 2D counterparts, thanks to drastic reductions in the interconnects' length through their smaller form factor. We can leverage the…

The rapid growth of data-intensive applications such as generative AI, scientific simulations, and large-scale analytics is driving modern supercomputers and data centers toward increasingly heterogeneous and tightly integrated…

The globalization of semiconductor supply chains has exposed Network-on-Chip (NoC) interconnects in System-on-Chip (SoC) architectures to critical security risks, including reverse engineering and IP theft. To address these threats, this…

Cryptography and Security · Computer Science 2025-03-10 Dipal Halder

IoT applications are one of the driving forces in making systems energy and power-efficient, given their resource constraints. However, because of security, latency, and transmission, we advocate for local computing through multi-processor…

Hardware Architecture · Computer Science 2024-06-27 Anderson I. Silva , Altamiro Susin , Fernanda L. Kastensmidt , Antonio Carlos S. Beck , Jose Rodrigo Azambuja

In many modern AI chips and multicore systems-on-chip, embedded applications exhibit predictable inter-core traffic behavior that can be characterized at design time. For such applications, a variety of design-time traffic management and…

Hardware Architecture · Computer Science 2026-05-07 Meysam Zaeemi , Mehdi Modarressi

Monolithic 3D (M3D) technology enables high density integration, performance, and energy-efficiency by sequentially stacking tiers on top of each other. M3D-based network-on-chip (NoC) architectures can exploit these benefits by adopting…

Emerging Technologies · Computer Science 2019-06-12 Shouvik Musavvir , Anwesha Chatterjee , Ryan Gary Kim , Dae Hyun Kim , Partha Pratim Pande

The quest for energy-efficient, scalable neuromorphic computing has elevated compute-in-memory (CIM) architectures to the forefront of hardware innovation. While memristive memories have been extensively explored for synaptic implementation…

Materials Science · Physics 2025-08-20 Kapil Bhardwaj , Ella Paasio , Sayani Majumdar

The ever-increasing computation complexity of fast-growing Deep Neural Networks (DNNs) has requested new computing paradigms to overcome the memory wall in conventional Von Neumann computing architectures. The emerging Computing-In-Memory…

Hardware Architecture · Computer Science 2021-07-21 Kaining Zhou , Yangshuo He , Rui Xiao , Kejie Huang

Network-on-chip (NoC) is the most promising design paradigm for the interconnect architecture of a multiprocessor system-on-chip (MPSoC). On the downside, a NoC has a significant impact on the overall energy consumption of the system. NoC…

Signal Processing · Electrical Eng. & Systems 2019-05-28 Jan Moritz Joseph , Lennart Bamberg , Imad Hajjar , Robert Schmidt , Thilo Pionteck , Alberto Garcia-Ortiz

The current manufacturing technology allows the integration of a complex multiprocessor system on one piece of silicon (MPSoC for Multiprocessor System-on- Chip). One way to manage the growing complexity of these systems is to increase the…

Hardware Architecture · Computer Science 2014-08-06 Abdelhakim Alali , Ismail Assayad , Mohamed Sadik

The growing scale of data requires efficient memory subsystems with large memory capacity and high memory performance. Disaggregated architecture has become a promising solution for today's cloud and edge computing for its scalability and…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-03-28 Jing Wang , Chao Li , Taolei Wang , Jinyang Guo , Hanzhang Yang , Yiming Zhuansun , Minyi Guo