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This paper is dedicated to control theoretically explainable application of autoencoders to optimal fault detection in nonlinear dynamic systems. Autoencoder-based learning is a standard machine learning method and widely applied for fault…

Systems and Control · Electrical Eng. & Systems 2023-05-17 Linlin Li , Steven X. Ding , Ketian Liang , Zhiwen Chen , Ting Xue

In several software development scenarios, it is desirable to detect runtime errors and exceptions in code snippets without actual execution. A typical example is to detect runtime exceptions in online code snippets before integrating them…

Software Engineering · Computer Science 2025-12-29 Hridya Dhulipala , Xiaokai Rong , Tien N. Nguyen

Large Language Models (LLMs), while demonstrating remarkable capabilities across various applications, present significant challenges during inference due to their substantial model size, especially when deployed on edge devices. Activation…

Machine Learning · Computer Science 2025-04-29 Zhenyu Zhang , Zechun Liu , Yuandong Tian , Harshit Khaitan , Zhangyang Wang , Steven Li

Observational studies provide the only evidence on the effectiveness of interventions when randomized controlled trials (RCTs) are impractical due to cost, ethical concerns, or time constraints. While many methodologies aim to draw causal…

As the complexity of the scan algorithm is dependent on the number of design registers, large SoC scan designs can no longer be verified in RTL simulation unless partitioned into smaller sub-blocks. This paper proposes a methodology to…

Other Computer Science · Computer Science 2014-09-12 Bill Jason Tomas , Yingtao Jiang , Mei Yang

As Neural Processing Units (NPU) or accelerators are increasingly deployed in a variety of applications including safety critical applications such as autonomous vehicle, and medical imaging, it is critical to understand the fault-tolerance…

Hardware Architecture · Computer Science 2024-04-16 Abhishek Tyagi , Reiley Jeyapaul , Chuteng Zhu , Paul Whatmough , Yuhao Zhu

The demise of Moore's Law and Dennard Scaling has revived interest in specialized computer architectures and accelerators. Verification and testing of this hardware depend heavily upon cycle-accurate simulation of register-transfer-level…

Hardware Architecture · Computer Science 2024-02-09 Mahyar Emami , Sahand Kashani , Keisuke Kamahori , Mohammad Sepehr Pourghannad , Ritik Raj , James R. Larus

Optimal use of computing resources requires extensive coding, tuning and benchmarking. To boost developer productivity in these time consuming tasks, we introduce the Experimental Linear Algebra Performance Studies framework (ELAPS), a…

Performance · Computer Science 2015-05-01 Elmar Peise , Paolo Bientinesi

Pre-fault tolerant quantum computers have already demonstrated the ability to estimate observable values accurately, at a scale beyond brute-force classical computation. This has been enabled by error mitigation techniques that often rely…

Feltor is a modular and free scientific software package. It allows developing platform independent code that runs on a variety of parallel computer architectures ranging from laptop CPUs to multi-GPU distributed memory systems. Feltor…

Learning policy from offline datasets through offline reinforcement learning (RL) holds promise for scaling data-driven decision-making while avoiding unsafe and costly online interactions. However, real-world data collected from sensors or…

Machine Learning · Computer Science 2025-03-04 Jiawei Xu , Rui Yang , Shuang Qiu , Feng Luo , Meng Fang , Baoxiang Wang , Lei Han

As Large Language Models (LLMs) are increasingly deployed in mission-critical software systems, detecting hallucinations and ``faked truthfulness'' has become a paramount engineering challenge. Current reliability architectures rely heavily…

Software Engineering · Computer Science 2026-04-16 Jonathan Pan

The advanced complex electronic systems increasingly demand safer and more secure hardware parts. Correspondingly, fault injection became a major verification milestone for both safety- and security-critical applications. However, fault…

Hardware Architecture · Computer Science 2021-03-10 Ahmet Cagri Bagbaba , Maksim Jenihhin , Raimund Ubar , Christian Sauer

The Logical Execution Time (LET) programming model has recently received considerable attention, particularly because of its timing and dataflow determinism. In LET, task computation appears always to take the same amount of time (called…

Systems and Control · Electrical Eng. & Systems 2024-03-11 Sen Wang , Dong Li , Ashrarul H. Sifat , Shao-Yu Huang , Xuanliang Deng , Changhee Jung , Ryan Williams , Haibo Zeng

Deep learning has achieved remarkable success in graph-related tasks, yet this accomplishment heavily relies on large-scale high-quality annotated datasets. However, acquiring such datasets can be cost-prohibitive, leading to the practical…

Machine Learning · Computer Science 2024-03-11 Ling-Hao Chen , Yuanshuo Zhang , Taohua Huang , Liangcai Su , Zeyi Lin , Xi Xiao , Xiaobo Xia , Tongliang Liu

Recently, a new trend of exploring sparsity for accelerating neural network training has emerged, embracing the paradigm of training on the edge. This paper proposes a novel Memory-Economic Sparse Training (MEST) framework targeting for…

Modern Machine Learning (ML) applications often benefit from structured sparsity, a technique that efficiently reduces model complexity and simplifies handling of sparse data in hardware. Sparse systolic tensor arrays - specifically…

Hardware Architecture · Computer Science 2025-04-29 Christodoulos Peltekis , Chrysostomos Nicopoulos , Giorgos Dimitrakopoulos

Linear recurrent neural networks enable powerful long-range sequence modeling with constant memory usage and time-per-token during inference. These architectures hold promise for streaming applications at the edge, but deployment in…

Machine Learning · Computer Science 2025-08-14 Alessandro Pierro , Steven Abreu , Jonathan Timcheck , Philipp Stratmann , Andreas Wild , Sumit Bam Shrestha

Along with the complexity of electronic systems for safety-critical applications, the cost of safety mechanisms evaluation by fault injection simulation is rapidly going up. To reduce these efforts, we propose a fault injection methodology…

Hardware Architecture · Computer Science 2020-01-28 Ahmet Cagri Bagbaba , Maksim Jenihhin , Jaan Raik , Christian Sauer

Triple Modular Redundancy (TMR) is one of the most common techniques in fault-tolerant systems, in which the output is determined by a majority voter. However, the design diversity of replicated modules and/or soft errors that are more…

Hardware Architecture · Computer Science 2023-07-06 Jafar Vafaei , Omid Akbari , Muhammad Shafique , Christian Hochberger
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