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Related papers: RTLRepoCoder: Repository-Level RTL Code Completion…

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Large Language Models (LLMs) have demonstrated potential in assisting with Register Transfer Level (RTL) design tasks. Nevertheless, there remains to be a significant gap in benchmarks that accurately reflect the complexity of real-world…

Machine Learning · Computer Science 2024-05-28 Ahmed Allam , Mohamed Shalan

The automatic generation of RTL code (e.g., Verilog) using natural language instructions and large language models (LLMs) has attracted significant research interest recently. However, most existing approaches heavily rely on commercial…

Programming Languages · Computer Science 2025-08-07 Shang Liu , Wenji Fang , Yao Lu , Qijun Zhang , Hongce Zhang , Zhiyao Xie

Recent advances in large language models (LLMs) have demonstrated impressive capabilities in code-related tasks, such as code generation and automated program repair. Despite their promising performance, most existing approaches for code…

Software Engineering · Computer Science 2025-09-03 Yicong Zhao , Shisong Chen , Jiacheng Zhang , Zhixu Li

Recent advances in Large Language Models (LLMs) have sparked growing interest in applying them to Electronic Design Automation (EDA) tasks, particularly Register Transfer Level (RTL) code generation. While several RTL datasets have been…

Hardware Architecture · Computer Science 2025-08-26 Anjiang Wei , Huanmi Tan , Tarun Suresh , Daniel Mendoza , Thiago S. F. X. Teixeira , Ke Wang , Caroline Trippel , Alex Aiken

Recent advances have demonstrated the promising capabilities of large language models (LLMs) in generating register-transfer level (RTL) code, such as Verilog. However, existing LLM-based frameworks still face significant challenges in…

Software Engineering · Computer Science 2025-09-09 Jian Zuo , Junzhe Liu , Xianyong Wang , Yicheng Liu , Navya Goli , Tong Xu , Hao Zhang , Umamaheswara Rao Tida , Zhenge Jia , Mengying Zhao

Large Language Models (LLMs) are gaining popularity for hardware design automation, particularly through Register Transfer Level (RTL) code generation. In this work, we examine the current literature on RTL generation using LLMs and…

Hardware Architecture · Computer Science 2025-07-21 Paul E. Calzada , Zahin Ibnat , Tanvir Rahman , Kamal Kandula , Danyu Lu , Sujan Kumar Saha , Farimah Farahmandi , Mark Tehranipoor

Recent advances in large language models (LLMs) have significantly improved automated code generation. While existing approaches have achieved strong performance at the function and file levels, real-world software engineering requires…

Software Engineering · Computer Science 2026-05-21 Yicheng Tao , Yuante Li , Yao Qin , Yepang Liu

Despite limited success in large language model (LLM)-based register-transfer-level (RTL) code generation, the root causes of errors remain poorly understood. To address this, we conduct a comprehensive error analysis, finding that most…

Hardware Architecture · Computer Science 2026-02-03 Jiazheng Zhang , Cheng Liu , Long Cheng , Xiaowei Li , Huawei Li

As large language models (LLMs) continue to be integrated into modern technology, there has been an increased push towards code generation applications, which also naturally extends to hardware design automation. LLM-based solutions for…

Hardware Architecture · Computer Science 2025-10-08 Zahin Ibnat , Paul E. Calzada , Rasin Mohammed Ihtemam , Sujan Kumar Saha , Jingbo Zhou , Farimah Farahmandi , Mark Tehranipoor

Automating hardware design could obviate a significant amount of human error from the engineering process and lead to fewer errors. Verilog is a popular hardware description language to model and design digital systems, thus generating…

Programming Languages · Computer Science 2022-12-22 Shailja Thakur , Baleegh Ahmad , Zhenxing Fan , Hammond Pearce , Benjamin Tan , Ramesh Karri , Brendan Dolan-Gavitt , Siddharth Garg

Recently, the use of large language models (LLMs) for software code generation, e.g., C/C++ and Python, has proven a great success. However, LLMs still suffer from low syntactic and functional correctness when it comes to the generation of…

Hardware Architecture · Computer Science 2024-07-29 Mingzhe Gao , Jieru Zhao , Zhe Lin , Wenchao Ding , Xiaofeng Hou , Yu Feng , Chao Li , Minyi Guo

Recent advances in retrieval-augmented generation (RAG) have initiated a new era in repository-level code completion. However, the invariable use of retrieval in existing methods exposes issues in both efficiency and robustness, with a…

Software Engineering · Computer Science 2024-06-05 Di Wu , Wasi Uddin Ahmad , Dejiao Zhang , Murali Krishna Ramanathan , Xiaofei Ma

Large language models (LLMs) have demonstrated remarkable capabilities in code generation tasks. However, repository-level code generation presents unique challenges, particularly due to the need to utilize information spread across…

Software Engineering · Computer Science 2025-11-24 Zhiyuan Pan , Xing Hu , Xin Xia , Xiaohu Yang

Recent advancements in large language models (LLMs) have sparked significant interest in the automatic generation of Register Transfer Level (RTL) designs, particularly using Verilog. Current research on this topic primarily focuses on…

Hardware Architecture · Computer Science 2025-04-22 Ning Wang , Bingkun Yao , Jie Zhou , Xi Wang , Zhe Jiang , Nan Guan

Retrieval-Augmented Generation (RAG) has become ubiquitous when deploying Large Language Models (LLMs), as it can address typical limitations such as generating hallucinated or outdated information. However, when building real-world RAG…

Computation and Language · Computer Science 2025-07-18 Patrice Béchard , Orlando Marquez Ayala

Automating Register Transfer Level (RTL) code generation using Large Language Models (LLMs) offers substantial promise for streamlining digital circuit design and reducing human effort. However, current LLM-based approaches face significant…

Artificial Intelligence · Computer Science 2025-05-20 Yiting Wang , Guoheng Sun , Wanghao Ye , Gang Qu , Ang Li

Recent advancements in code generation have shown remarkable success across software domains, yet hardware description languages (HDLs) such as Verilog remain underexplored due to their concurrency semantics, syntactic rigidity, and…

Machine Learning · Computer Science 2025-08-27 Fu Teng , Miao Pan , Xuhong Zhang , Zhezhi He , Yiyao Yang , Xinyi Chai , Mengnan Qi , Liqiang Lu , Jianwei Yin

In real-world software engineering tasks, solving a problem often requires understanding and modifying multiple functions, classes, and files across a large codebase. Therefore, on the repository level, it is crucial to extract the relevant…

Software Engineering · Computer Science 2024-09-25 Jicheng Wang , Yifeng He , Hao Chen

Large Language Models (LLMs) have recently achieved strong performance in software code generation. However, applying them to hardware description languages (HDLs), such as Verilog, remains challenging because high-quality training data are…

Hardware Architecture · Computer Science 2026-04-21 Yan Tan , Tong Liu , Xiangchen Meng , Yangdi Lyu

Repository-level code completion remains a challenging task for existing code large language models (code LLMs) due to their limited understanding of repository-specific context and domain knowledge. While retrieval-augmented generation…

Software Engineering · Computer Science 2026-01-28 Tianyue Jiang , Yanli Wang , Yanlin Wang , Daya Guo , Ensheng Shi , Yuchi Ma , Jiachi Chen , Zibin Zheng
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