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This paper introduces the eGPU, a SIMT soft processor designed for FPGAs. Soft processors typically achieve modest operating frequencies, a fraction of the headline performance claimed by modern FPGA families, and obtain correspondingly…

Hardware Architecture · Computer Science 2023-07-18 Martin Langhammer , George Constantinides

Current soft processor architectures for FPGAs do not utilize the potential of the massive parallelism available. FPGAs now support many thousands of embedded floating point operators, and have similar computational densities to GPGPUs.…

Hardware Architecture · Computer Science 2024-01-10 Martin Langhammer , George A. Constantinides

Recent advances in soft GPGPU architectures have shown that a small (<10K LUT), high performance (770 MHz) processor is possible in modern FPGAs. In this paper we architect and evaluate soft SIMT processor banked memories, which can support…

Hardware Architecture · Computer Science 2025-04-01 Martin Langhammer , George A. Constantinides

eGPU, a recently-reported soft GPGPU for FPGAs, has demonstrated very high clock frequencies (more than 750 MHz) and small footprint. This means that for the first time, commercial soft processors may be competitive for the kind of heavy…

Hardware Architecture · Computer Science 2024-06-06 Martin Langhammer , George A. Constantinides

We present a customizable soft architecture which allows for the execution of GPGPU code on an FPGA without the need to recompile the design. Issues related to scaling the overlay architecture to multiple GPGPU multiprocessors are…

Hardware Architecture · Computer Science 2016-06-22 Kevin Andryc , Tedy Thomas , Russell Tessier

FPGA overlays are commonly implemented as coarse-grained reconfigurable architectures with a goal to improve designers' productivity through balancing flexibility and ease of configuration of the underlying fabric. To truly facilitate full…

Hardware Architecture · Computer Science 2016-06-22 Ho-Cheung Ng , Cheng Liu , Hayden Kwok-Hay So

Field programmable gate arrays (FPGAs) provide designers with the ability to quickly create hardware circuits. Increases in FPGA configurable logic capacity and decreasing FPGA costs have enabled designers to more readily incorporate FPGAs…

Hardware Architecture · Computer Science 2011-11-09 Roman Lysecky , Frank Vahid

Simulators are a primary tool in computer architecture research but are extremely computationally intensive. Simulating modern architectures with increased core counts and recent workloads can be challenging, even on modern hardware. This…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-05-27 Rodrigo Huerta , Antonio González

In recent years, Field-Programmable Gate Arrays (FPGA) have evolved rapidly paving the way for a whole new range of computing paradigms. On the other hand, computer applications are evolving. There is a rising demand for a system that is…

Hardware Architecture · Computer Science 2023-05-23 Mohammed Eqbal Eshaq

With the growing number of data-intensive workloads, GPU, which is the state-of-the-art single-instruction-multiple-thread (SIMT) processor, is hindered by the memory bandwidth wall. To alleviate this bottleneck, previously proposed…

Hardware Architecture · Computer Science 2021-03-12 Xinfeng Xie , Peng Gu , Yufei Ding , Dimin Niu , Hongzhong Zheng , Yuan Xie

GPUs are critical for compute-intensive applications, yet emerging workloads such as recommender systems, graph analytics, and data analytics often exceed GPU memory capacity. Existing solutions allow GPUs to use CPU DRAM or SSDs as…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-08-27 Zhuoping Yang , Jinming Zhuang , Xingzhen Chen , Alex K. Jones , Peipei Zhou

The growing capacity of integration allows to instantiate hundreds of soft-core processors in a single FPGA to create a reconfigurable multiprocessing system. Lately, FPGAs have been proven to give a higher energy efficiency than…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-05-03 David Castells-Rufas , Albert Saa-Garriga , Jordi Carrabina

This paper describes two research projects that develop new low-cost techniques for testing devices with multiple high-speed (2 to 5 Gbps) signals. Each project uses commercially available components to keep costs low, yet achieves…

Hardware Architecture · Computer Science 2011-11-09 D. C. Keezer , C. Gray , A. Majid , N. Taher

With high computation power and memory bandwidth, graphics processing units (GPUs) lend themselves to accelerate data-intensive analytics, especially when such applications fit the single instruction multiple data (SIMD) model. However,…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-12-12 Hang Liu , H. Howie Huang

Graph analytics are vital in fields such as social networks, biomedical research, and graph neural networks (GNNs). However, traditional CPUs and GPUs struggle with the memory bottlenecks caused by large graph datasets and their…

Hardware Architecture · Computer Science 2024-11-25 Oluwole Jaiyeoba , Abdullah T. Mughrabi , Morteza Baradaran , Beenish Gul , Kevin Skadron

Recent advances in reprogrammable hardware (e.g., FPGAs) and memory technology (e.g., DDR4, HBM) promise to solve performance problems inherent to graph processing like irregular memory access patterns on traditional hardware (e.g., CPU).…

Hardware Architecture · Computer Science 2021-04-19 Jonas Dann , Daniel Ritter , Holger Fröning

Numerical codes that require arbitrary precision floating point (APFP) numbers for their core computation are dominated by elementary arithmetic operations due to the super-linear complexity of multiplication in the number of mantissa bits.…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-04-14 Johannes de Fine Licht , Christopher A. Pattison , Alexandros Nikolaos Ziogas , David Simmons-Duffin , Torsten Hoefler

Graphics Processing Units (GPUs) support dynamic voltage and frequency scaling (DVFS) in order to balance computational performance and energy consumption. However, there still lacks simple and accurate performance estimation of a given GPU…

Performance · Computer Science 2018-06-14 Qiang Wang , Xiaowen Chu

With at least 50 cores, Intel Xeon Phi is a true many-core architecture. Featuring fairly powerful cores, two cache levels, and very fast interconnections, the Xeon Phi can get a theoretical peak of 1000 GFLOPs and over 240 GB/s. These…

Distributed, Parallel, and Cluster Computing · Computer Science 2013-12-23 Jianbin Fang , Ana Lucia Varbanescu , Henk Sips , Lilun Zhang , Yonggang Che , Chuanfu Xu

We present a hardware-accelerated SAT solver suitable for processor/Field Programmable Gate Arrays (FPGA) hybrid platforms, which have become the norm in the embedded domain. Our solution addresses a known bottleneck in SAT solving…

Hardware Architecture · Computer Science 2023-12-19 Hariprasadh Godindasamy , Babak Esfandiari , Paulo Garcia
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