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The widespread adoption of data-centric algorithms, particularly Artificial Intelligence (AI) and Machine Learning (ML), has exposed the limitations of centralized processing infrastructures, driving a shift towards edge computing. This…

RISC-V CPUs leverage the RVV (RISC-V Vector) extension to accelerate data-parallel workloads. In addition to arithmetic operations, RVV includes powerful permutation instructions that enable flexible element rearrangement within vector…

Hardware Architecture · Computer Science 2025-06-02 Vasileios Titopoulos , George Alexakis , Chrysostomos Nicopoulos , Giorgos Dimitrakopoulos

Handling vast amounts of data is crucial in today's world. The growth of high-performance computing has created a need for parallelization, particularly in the area of machine learning algorithms such as ANN (Approximate Nearest Neighbors).…

Machine Learning · Computer Science 2024-07-19 Konstantin Rumyantsev , Pavel Yakovlev , Andrey Gorshkov , Andrey P. Sokolov

The emergence of a new, open, and free instruction set architecture, RISC-V, has heralded a new era in microprocessor architectures. Starting with low-power, low-performance prototypes, the RISC-V community has a good chance of moving…

Performance · Computer Science 2023-09-06 Valentin Volokitin , Evgeny Kozinov , Valentina Kustikova , Alexey Liniov , Iosif Meyerov

Real-time systems, particularly those used in domains like automated driving, are increasingly adopting neural networks. From this trend arises the need for high-performance hardware exhibiting predictable timing behavior. While…

Hardware Architecture · Computer Science 2026-02-26 Maximilian Kirschner , Konstantin Dudzik , Ben Krusekamp , Jürgen Becker

Responding to the "datacenter tax" and "killer microseconds" problems for datacenter applications, diverse solutions including Smart NIC-based ones have been proposed. Nonetheless, they often suffer from high overhead of communications over…

Hardware Architecture · Computer Science 2022-10-19 Yifan Yuan , Jinghan Huang , Yan Sun , Tianchen Wang , Jacob Nelson , Dan R. K. Ports , Yipeng Wang , Ren Wang , Charlie Tai , Nam Sung Kim

The proliferation of edge devices necessitates efficient computational architectures for lightweight tasks, particularly deep neural network (DNN) inference. Traditional NPUs, though effective for such operations, face challenges in power,…

Hardware Architecture · Computer Science 2024-07-04 Won Hyeok Kim , Hyeong Jin Kim , Tae Hee Han

Neural networks are increasingly used in real-time systems, such as automated driving applications. This requires high-performance hardware with predictable timing behavior. State-of-the-art real-time hardware is limited in memory and…

Hardware Architecture · Computer Science 2024-10-15 Maximilian Kirschner , Konstantin Dudzik , Jürgen Becker

Recent advancements in post-quantum cryptographic algorithms have led to their standardization by the National Institute of Standards and Technology (NIST) to safeguard information security in the post-quantum era. These algorithms,…

Hardware Architecture · Computer Science 2025-09-30 Jingyao Zhang , Elaheh Sadredini

Existing state-of-the-art vertical autoscalers for containerized environments are traditionally built for cloud applications, which might behave differently than HPC workloads with their dynamic resource consumption. In these environments,…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-05-07 Daniel Medeiros , Jeremy J. Williams , Jacob Wahlgren , Leonardo Saud Maia Leite , Ivy Peng

The emergence of heterogeneity and domain-specific architectures targeting deep learning inference show great potential for enabling the deployment of modern CNNs on resource-constrained embedded platforms. A significant development is the…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-25 Dmitri Lyalikov

This paper presents the Neural Cache architecture, which re-purposes cache structures to transform them into massively parallel compute units capable of running inferences for Deep Neural Networks. Techniques to do in-situ arithmetic in…

Hardware Architecture · Computer Science 2018-05-11 Charles Eckert , Xiaowei Wang , Jingcheng Wang , Arun Subramaniyan , Ravi Iyer , Dennis Sylvester , David Blaauw , Reetuparna Das

Open-source RISC-V cores are increasingly adopted in high-end embedded domains such as automotive, where maximizing instructions per cycle (IPC) is becoming critical. Building on the industry-supported open-source CVA6 core and its…

Edge AI deployment faces critical challenges balancing computational performance, energy efficiency, and resource constraints. This paper presents FPGA-accelerated RISC-V instruction set architecture (ISA) extensions for efficient neural…

Hardware Architecture · Computer Science 2025-11-11 Arya Parameshwara , Santosh Hanamappa Mokashi

The evolution of quantization and mixed-precision techniques has unlocked new possibilities for enhancing the speed and energy efficiency of NNs. Several recent studies indicate that adapting precision levels across different parameters can…

Machine Learning · Computer Science 2025-09-19 Giorgos Armeniakos , Alexis Maras , Sotirios Xydis , Dimitrios Soudris

The RISC-V "V" extension introduces vector processing to the RISC-V architecture. Unlike most SIMD extensions, it supports long vectors which can result in significant improvement of multiple applications. In this paper, we present our…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-11-10 Sonia Rani Gupta , Nikela Papadopoulou , Miquel Pericàs

Data-intensive workloads and applications, such as machine learning (ML), are fundamentally limited by traditional computing systems based on the von-Neumann architecture. As data movement operations and energy consumption become key…

Hardware Architecture · Computer Science 2021-12-24 Mehdi Hassanpour , Marc Riera , Antonio González

Solid-State Drives (SSDs) have significant performance advantages over traditional Hard Disk Drives (HDDs) such as lower latency and higher throughput. Significantly higher price per capacity and limited lifetime, however, prevents…

Hardware Architecture · Computer Science 2021-11-08 Shahriar Ebrahimi , Reza Salkhordeh , Seyed Ali Osia , Ali Taheri , Hamid Reza Rabiee , Hossein Asadi

The increasing demand for on-device intelligence in Edge AI and TinyML applications requires the efficient execution of modern Convolutional Neural Networks (CNNs). While lightweight architectures like MobileNetV2 employ Depthwise Separable…

Hardware Architecture · Computer Science 2025-11-27 Muhammed Yildirim , Ozcan Ozturk

Traditional von Neumann architecture based processors become inefficient in terms of energy and throughput as they involve separate processing and memory units, also known as~\textit{memory wall}. The memory wall problem is further…

Signal Processing · Electrical Eng. & Systems 2020-05-20 Abhash Kumar , Jawar Singh , Sai Manohar Beeraka , Bharat Gupta
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