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The emergence of CXL (Compute Express Link) promises to transform the status of interconnects between host and devices and in turn impact the design of all software layers. With its low overhead, low latency, and memory coherency…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-04-15 Raja Gond , Purushottam Kulkarni

While Compute Express Link (CXL) enables support for cache-coherent shared memory among multiple nodes, it also introduces new types of failures--processes can fail before data does, or data might fail before a process does. The lack of a…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-07-18 Yi Xu , Suyash Mahar , Ziheng Liu , Mingyao Shen , Steven Swanson

Large-scale AI training and inference require hundreds of gigabytes to terabytes of DRAM with high peak to average utilization ratios, resulting in overprovisioning. In cloud computing, DRAM constitutes a significant share of the cost. Yet,…

Hardware Architecture · Computer Science 2026-05-28 Kaustav Goswami , Maryam Babaie , Hoa Nguyen , Venkatesh Akella , Jason Lowe-Power

The Compute Express Link (CXL) is an open industry-standard interconnect between processors and devices such as accelerators, memory buffers, smart network interfaces, persistent memory, and solid-state drives. CXL offers coherency and…

Hardware Architecture · Computer Science 2024-05-09 Debendra Das Sharma , Robert Blankenship , Daniel S. Berger

Compute eXpress Link (CXL) is emerging as a promising memory interface technology. However, its performance characteristics remain largely unclear due to the limited availability of production hardware. Key questions include: What are the…

Performance · Computer Science 2025-10-14 Xi Wang , Jie Liu , Jianbo Wu , Shuangyan Yang , Jie Ren , Bhanu Shankar , Dong Li

Memory disaggregation addresses memory imbalance in a cluster by decoupling CPU and memory allocations of applications while also increasing the effective memory capacity for (memory-intensive) applications beyond the local memory limit…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-02-07 Anil Yelam

Message Passing Interface (MPI) is a foundational programming model for high-performance computing. MPI libraries traditionally employ network interconnects (e.g., Ethernet and InfiniBand) and network protocols (e.g., TCP and RoCE) with…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-16 Xi Wang , Bin Ma , Jongryool Kim , Byungil Koh , Hoshik Kim , Dong Li

In our exploration of Composable Memory systems utilizing CXL, we focus on overcoming adoption barriers at Hyperscale, underscored by economic models demonstrating Total Cost of Ownership (TCO). While CXL addresses the pressing memory…

Emerging Technologies · Computer Science 2024-04-05 Angelos Arelakis , Nilesh Shah , Yiannis Nikolakopoulos , Dimitrios Palyvos-Giannas

Memory disaggregation has recently been adopted in data centers to improve resource utilization, motivated by cost and sustainability. Recent studies on large-scale HPC facilities have also highlighted memory underutilization. A promising…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-11-30 Jacob Wahlgren , Gabin Schieffer , Maya Gokhale , Ivy Peng

Recent Serverless workloads tend to be largescaled/CPU-memory intensive, such as DL, graph applications, that require dynamic memory-to-compute resources provisioning. Meanwhile, recent solutions seek to design page management strategies…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-09-26 Yuze Li , Shunyu Yao

High-Performance Computing (HPC) and Artificial Intelligence (AI) workloads typically demand substantial memory bandwidth and, to a degree, memory capacity. CXL memory expansion modules, also known as CXL "type-3" devices, enable…

Operating Systems · Computer Science 2024-12-18 Rohit Sehgal , Vishal Tanna , Vinicius Petrucci , Anil Godbole

Heterogeneous memory technologies are increasingly important instruments in addressing the memory wall in HPC systems. While most are deployed in single node setups, CXL.mem is a technology that implements memories that can be attached to…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-10 Stepan Vanecek , Matthew Turner , Manisha Gajbe , Matthew Wolf , Martin Schulz

The "Disaggregated Server" concept has been proposed for datacenters where the same type server resources are aggregated in their respective pools, for example a compute pool, memory pool, network pool, and a storage pool. Each server is…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-03-09 Bulent Abali , Richard J. Eickemeyer , Hubertus Franke , Chung-Sheng Li , Marc A. Taubenblatt

Datacenter applications often rely on remote procedure calls (RPCs) for fast, efficient, and secure communication. However, RPCs are slow, inefficient, and hard to use as they require expensive serialization and compression to communicate…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-08-22 Suyash Mahar , Ehsan Hajyjasini , Seungjin Lee , Zifeng Zhang , Mingyao Shen , Steven Swanson

This paper proposes ScalePool, a novel cluster architecture designed to interconnect numerous accelerators using unified hardware interconnects rather than traditional long-distance networking. ScalePool integrates Accelerator-Centric Links…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-10-17 Hyein Woo , Miryeong Kwon , Jiseon Kim , Eunjee Na , Hanjin Choi , Seonghyeon Jang , Myoungsoo Jung

The memory system is a major performance determinant for server processors. Ever-growing core counts and datasets demand higher bandwidth and capacity as well as lower latency from the memory system. To keep up with growing demands,…

Hardware Architecture · Computer Science 2023-05-10 Albert Cho , Anish Saxena , Moinuddin Qureshi , Alexandros Daglis

This paper proposes TRAININGCXL that can efficiently process large-scale recommendation datasets in the pool of disaggregated memory while making training fault tolerant with low overhead. To this end, i) we integrate persistent memory…

Hardware Architecture · Computer Science 2023-01-23 Miryeong Kwon , Junhyeok Jang , Hanjin Choi , Sangwon Lee , Myoungsoo Jung

Compute eXpress Link (CXL) is a promising technology for memory disaggregation and expansion. Especially, CXL makes it more effectively for large-capacity storage devices such as Solid State Drive (SSD) to be deployed in the memory pool.…

Hardware Architecture · Computer Science 2025-01-07 Yaohui Wang , Zicong Wang , Fanfeng Meng , Yanjing Wang , Yang Ou , Lizhou Wu , Wentao Hong , Xuran Ge , Jijun Cao

The continual increase of cores on server-grade CPUs raises demands on memory systems, which are constrained by limited off-chip pin and data transfer rate scalability. As a result, high-end processors typically feature lower memory…

Hardware Architecture · Computer Science 2025-11-18 Divya Kiran Kadiyala , Alexandros Daglis

Processing-in-memory (PIM) reduces data movement by executing near memory, but our large-scale characterization on real PIM hardware shows that end-to-end performance is often limited by disjoint host and device address spaces that force…

Emerging Technologies · Computer Science 2025-11-20 I-Ting Lee , Bao-Kai Wang , Liang-Chi Chen , Wen Sheng Lim , Da-Wei Chang , Yu-Ming Chang , Chieng-Chung Ho