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Three-dimensional (3D)-stacking technology, which enables the integration of DRAM and logic dies, offers high bandwidth and low energy consumption. This technology also empowers new memory designs for executing tasks not traditionally…

Hardware Architecture · Computer Science 2018-12-05 Ramyad Hadidi , Bahar Asgari , Burhan Ahmad Mudassar , Saibal Mukhopadhyay , Sudhakar Yalamanchili , Hyesoon Kim

The CXL-based solid-state drive (CXL-SSD) provides a promising approach towards scaling the main memory capacity at low cost. However, the CXL-SSD faces performance challenges due to the long flash access latency and unpredictable events…

Hardware Architecture · Computer Science 2025-01-22 Haoyang Zhang , Yuqi Xue , Yirui Eric Zhou , Shaobo Li , Jian Huang

Conventional computing paradigm struggles to fulfill the rapidly growing demands from emerging applications, especially those for machine intelligence, because much of the power and energy is consumed by constant data transfers between…

CXL (Compute Express Link) enables multiple hosts to share byte-addressable memory with hardware cache coherence, but no existing filesystem exploits this for lock-free multi-host coordination. We present DaxFS, a Linux filesystem for CXL…

Operating Systems · Computer Science 2026-04-03 Cong Wang , Yiwei Yang , Yusheng Zheng

In recent years, there is an increasing demand of big memory systems so to perform large scale data analytics. Since DRAM memories are expensive, some researchers are suggesting to use other memory systems such as non-volatile memory (NVM)…

Performance · Computer Science 2016-10-03 Gaoying Ju , Yongkun Li , Yinlong Xu , Jiqiang Chen , John C. S. Lui

Compute Express Link (CXL) serves as a rising industry standard, delivering high-speed cache-coherent links to a variety of devices, including host CPUs, computational accelerators, and memory devices. It is designed to promote system…

Hardware Architecture · Computer Science 2024-11-14 Yuda An , Shushu Yi , Bo Mao , Qiao Li , Mingzhe Zhang , Ke Zhou , Nong Xiao , Guangyu Sun , Xiaolin Wang , Yingwei Luo , Jie Zhang

AI clusters today are one of the major uses of High Bandwidth Memory (HBM). However, HBM is suboptimal for AI workloads for several reasons. Analysis shows HBM is overprovisioned on write performance, but underprovisioned on density and…

This paper proposes TRAININGCXL that can efficiently process large-scale recommendation datasets in the pool of disaggregated memory while making training fault tolerant with low overhead. To this end, i) we integrate persistent memory…

Hardware Architecture · Computer Science 2023-01-23 Miryeong Kwon , Junhyeok Jang , Hanjin Choi , Sangwon Lee , Myoungsoo Jung

Non-Volatile Main Memories (NVMMs) have recently emerged as promising technologies for future memory systems. Generally, NVMMs have many desirable properties such as high density, byte-addressability, non-volatility, low cost, and energy…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-10-12 Haikun Liu , Di Chen , Hai Jin , Xiaofei Liao , Bingsheng He , Kan Hu , Yu Zhang

It has become increasingly difficult to understand the complex interaction between modern applications and main memory, composed of DRAM chips. Manufacturers are now selling and proposing many different types of DRAM, with each DRAM type…

Hardware Architecture · Computer Science 2019-10-21 Saugata Ghose , Tianshi Li , Nastaran Hajinazar , Damla Senol Cali , Onur Mutlu

While containers efficiently implement the idea of operating-system-level application virtualization, they are often insufficient to increase the server utilization to a desirable level. The reason is that in practice many containerized…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-06-26 Jan S. Rellermeyer , Maher Amer , Richard Smutzer , Karthick Rajamani

Datacenter applications often rely on remote procedure calls (RPCs) for fast, efficient, and secure communication. However, RPCs are slow, inefficient, and hard to use as they require expensive serialization and compression to communicate…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-08-22 Suyash Mahar , Ehsan Hajyjasini , Seungjin Lee , Zifeng Zhang , Mingyao Shen , Steven Swanson

AI chips commonly employ SRAM memory as buffers for their reliability and speed, which contribute to high performance. However, SRAM is expensive and demands significant area and energy consumption. Previous studies have explored replacing…

Hardware Architecture · Computer Science 2023-12-07 Duy-Thanh Nguyen , Abhiroop Bhattacharjee , Abhishek Moitra , Priyadarshini Panda

Commodity memory interfaces have difficulty in scaling memory capacity to meet the needs of modern multicore and big data systems. DRAM device density and maximum device count are constrained by technology, package, and signal in- tegrity…

Hardware Architecture · Computer Science 2015-05-14 Zehan Cui , Tianyue Lu , Haiyang Pan , Sally A. Mckee , Mingyu Chen

Large Language Models (LLMs) are becoming increasingly data-intensive due to growing model sizes, and they are becoming memory-bound as the context length and, consequently, the key-value (KV) cache size increase. Inference, particularly…

Hardware Architecture · Computer Science 2025-11-18 Khyati Kiyawat , Zhenxing Fan , Yasas Seneviratne , Morteza Baradaran , Akhil Shekar , Zihan Xia , Mingu Kang , Kevin Skadron

Upcoming CXL-based disaggregated memory devices feature special purpose units to offload compute to near-memory. In this paper, we explore opportunities for offloading compute to general purpose cores on CXL memory devices, thereby enabling…

Emerging Technologies · Computer Science 2024-04-04 Jon Hermes , Josh Minor , Minjun Wu , Adarsh Patil , Eric Van Hensbergen

Solid-state storage architectures based on NAND or emerging memory devices (SSD), are fundamentally architected and optimized for both reliability and performance. Achieving these simultaneous goals requires co-design of memory components…

Hardware Architecture · Computer Science 2026-03-20 Jay Sarkar , Vamsi Pavan Rayaprolu , Abhijeet Bhalerao

Many high end and next generation computing systems to incorporated alternative memory technologies to meet performance goals. Since these technologies present distinct advantages and tradeoffs compared to conventional DDR* SDRAM, such as…

Performance · Computer Science 2021-10-06 M. Ben Olson , Brandon Kammerdiener , Kshitij A. Doshi , Terry Jones , Michael R. Jantz

The speed of modern digital systems is severely limited by memory latency (the ``Memory Wall'' problem). Data exchange between Logic and Memory is also responsible for a large part of the system energy consumption. Logic--In--Memory (LiM)…

Hardware Architecture · Computer Science 2023-04-14 Fabrizio Ottati , Giovanna Turvani , Marco Vacca , Guido Masera

In today's data-centric world, where data fuels numerous application domains, with machine learning at the forefront, handling the enormous volume of data efficiently in terms of time and energy presents a formidable challenge. Conventional…

Hardware Architecture · Computer Science 2024-01-29 Asif Ali Khan , João Paulo C. De Lima , Hamid Farzaneh , Jeronimo Castrillon