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Related papers: Demystifying FPGA Hard NoC Performance

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Convolutional Neural Networks (CNNs) are computationally intensive algorithms that currently require dedicated hardware to be executed. In the case of FPGA-Based accelerators, we point-out in this work the challenge of Multi-Operand Adders…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-07-03 Kamel Abdelouahab , François Berry , Maxime Pelcat

FPGAs have been shown to be a promising platform for deploying Quantised Neural Networks (QNNs) with high-speed, low-latency, and energy-efficient inference. However, the complexity of modern deep-learning models limits the performance on…

Hardware Architecture · Computer Science 2025-11-06 Changhong Li , Biswajit Basu , Shreejith Shanker

An adaptive FPGA architecture based on the NoC (Network-on-Chip) approach is used for the multispectral image correlation. This architecture must contain several distance algorithms depending on the characteristics of spectral images and…

Hardware Architecture · Computer Science 2009-01-27 Linlin Zhang , Anne Claire Legrand , Virginie Fresse , Viktor Fischer

The rapid growth in computing demands, particularly driven by artificial intelligence applications, has begun to exceed the capabilities of traditional electronic hardware. Optical computing offers a promising alternative due to its…

Hardware Architecture · Computer Science 2025-07-24 Shupeng Ning , Hanqing Zhu , Chenghao Feng , Jiaqi Gu , David Z. Pan , Ray T. Chen

As distributed optimization scales to meet the demands of Large Language Model (LLM) training, hardware failures become increasingly non-negligible. Existing fault-tolerant training methods often introduce significant computational or…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-10-21 Rizhen Hu , Yutong He , Ran Yan , Mou Sun , Binghang Yuan , Kun Yuan

Multi-threaded applications are capable of exploiting the full potential of many-core systems. However, Network-on-Chip (NoC) based inter-core communication in many-core systems is responsible for 60-75% of the miss latency experienced by…

Hardware Architecture · Computer Science 2021-01-05 Abhijit Das , John Jose , Prabhat Mishra

How can we find meaningful clusters in a graph robustly against noise edges? Graph clustering (i.e., dividing nodes into groups of similar ones) is a fundamental problem in graph analysis with applications in various fields. Recent studies…

Machine Learning · Computer Science 2023-11-09 Hyeonsoo Jo , Fanchen Bu , Kijung Shin

Neural networks have become dominant computational workloads across cloud and edge platforms, but their rapid growth in model size and deployment diversity has exposed hardware bottlenecks increasingly dominated by memory movement,…

Systems and Control · Electrical Eng. & Systems 2026-01-16 Bin Xu , Ayan Banerjee , Sandeep Gupta

The many cores design research community have shown high interest in optical crossbars on chip for more than a decade. Key properties of optical crossbars, namely a) contention-free data routing b) low-latency communication and c) potential…

Emerging Technologies · Computer Science 2015-12-24 Hui Li , Sébastien Le Beux , Gabriela Nicolescu , Ian O 'Connor

A noise-tolerant data communications fabric has been developed to meet the real-time data acquisition and control requirements of fast feedback loops, machine protection systems, pulse-to-pulse sequencing, and machine-experiment…

Instrumentation and Detectors · Physics 2007-05-23 E. J. Siskind

Recently deep neural networks have received considerable attention due to their ability to extract and represent high-level abstractions in data sets. Deep neural networks such as fully-connected and convolutional neural networks have shown…

Neural and Evolutionary Computing · Computer Science 2017-04-03 Arash Ardakani , Carlo Condo , Warren J. Gross

Convolutional Neural Networks (CNNs) are currently adopted to solve an ever greater number of problems, ranging from speech recognition to image classification and segmentation. The large amount of processing required by CNNs calls for…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-06-06 Kamel Abdelouahab , Maxime Pelcat , Jocelyn Serot , François Berry

SMART NoC, which transmits unconflicted flits to distant processing elements (PEs) in one cycle through the express bypass, is a high-performance NoC design proposed recently. However, if contention occurs, flits with low priority would not…

Hardware Architecture · Computer Science 2020-11-19 Hui Chen , Peng Chen , Jun Zhou , Duong H. K. Luan , Weichen Liu

MPSoCs are gaining popularity because of its potential to solve computationally expensive applications. A multi-core processor combines two or more independent cores (normally a CPU) into a single package composed of a single integrated…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-04-14 Bilal Habib , Ahmed Anber , Sultan Daud Khan

Most FPGA boards in the HPC domain are well-suited for parallel scaling because of the direct integration of versatile and high-throughput network ports. However, the utilization of their network capabilities is often challenging and…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-04-09 Marius Meyer , Tobias Kenter , Lucian Petrica , Kenneth O'Brien , Michaela Blott , Christian Plessl

Though CNNs are highly parallel workloads, in the absence of efficient on-chip memory reuse techniques, an accelerator for them quickly becomes memory bound. In this paper, we propose a CNN accelerator design for inference that is able to…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-08-26 Kingshuk Majumder , Shubham Nema , Uday Bondhugula

The rapid advancement of embedded multicore and many-core systems has revolutionized computing, enabling the development of high-performance, energy-efficient solutions for a wide range of applications. As models scale up in size, data…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-10-15 Ruhai Lin , Rui-Jie Zhu , Jason K. Eshraghian

Hardware specialization is becoming a key enabler of energyefficient performance. Future systems will be increasingly heterogeneous, integrating multiple specialized and programmable accelerators, each with different memory demands.…

Hardware Architecture · Computer Science 2021-04-26 Johnathan Alsop , Weon Taek Na , Matthew D. Sinclair , Samuel Grayson , Sarita V. Adve

In the last decade, specific-purpose computing and storage devices, such as GPUs, TPUs, or high-speed storage, have been incorporated into server nodes of Supercomputers and Data centers. The development of high-bandwidth memory (HBM)…

Hardware Architecture · Computer Science 2025-10-23 Joaquin Tarraga-Moreno , Jesus Escudero-Sahuquillo , Pedro Javier Garcia , Francisco J. Quiles

We present algorithms that design NoCs with guaranteed quality of service. Given a topology, a mapping of tasks to processing elements, and traffic requirements between the tasks, the algorithm computes the interconnection widths, a…

Networking and Internet Architecture · Computer Science 2015-09-02 Guy Even , Yaniv Fais