Related papers: On Digital Optimization of Analog Self-Interferenc…

In this work, we adopt channel inversion power control (CIPC) to achieve covert communications aided by a full-duplex receiver. Specifically, the transmitter varies the power and phase of transmitted signals as per the channel to the…

This letter proposes a novel anti-interference technique, semantic interference cancellation (SemantIC), for enhancing information quality towards the sixth-generation (6G) wireless networks. SemantIC only requires the receiver to…

Emerging connect-and-manage interconnection practices allow gigawatt-scale artificial intelligence data centers (AIDCs) to connect to the transmission network without prior network upgrades, at the cost of real-time curtailment during grid…

In this paper, we propose Advanced Tree-algorithm with Interference Cancellation (ATIC), a variant of binary tree-algorithm with successive interference cancellation (SICTA) introduced by Yu and Giannakis. ATIC assumes that Interference…

Digital self-interference cancellation (D-SIC) plays a crucial role in in-band full-duplex radios. Unfortunately, its fundamental limit remains unclear. In this paper, we aim to address this problem by exploring the performance limit of the…

In this paper, we propose a widely-linear (WL) receiver structure for multiple access interference (MAI) and {jamming signal (JS)} suppression in direct-sequence code-division multiple-access (DS-CDMA) systems. A vector space projection…

Full-duplex (FD) wireless can significantly enhance spectrum efficiency but requires tremendous amount of self-interference (SI) cancellation. Recent advances in the RFIC community enabled wideband RF SI cancellation (SIC) in integrated…

Communication systems with low-resolution analog-to-digital-converters (ADCs) can exploit channel state information at the transmitter and receiver. This paper presents codebook designs and performance analyses for limited feedback MIMO…

Motivated by the demand for energy-efficient communication solutions in the next generation cellular network, a mixed-ADC architecture for massive multiple input multiple output (MIMO) systems is proposed, which differs from previous works…

Here in this paper we are presenting a digital system background technique for correcting the time offset error rate and gain mismatches in a time interleaved analog to digital converter system for N channel communication using 8 bit…

Data center interconnects (DCIs) will have to support throughputs of 400 Gbps or more per wavelength in the near future. To achieve such high data rates, coherent modulation and detection is used, which conventionally requires high-speed…

Consider an integrated sensing and communication (ISAC) system where a base station (BS) employs a full-duplex radio to simultaneously serve multiple users and detect a target. The detection performance of the BS may be compromised by…

Low-resolution digital-to-analog converters (DACs) and analog-to-digital converters (ADCs) are considered to reduce cost and power consumption in multiuser massive multiple-input multiple-output (MIMO). Using the Bussgang theorem, we derive…

Integrated sensing and communication (ISAC) has emerged as a pivotal technology for next-generation wireless communication and radar systems, enabling high-resolution sensing and high-throughput communication with shared spectrum and…

Digital-to-analog converters (DAC) are indispensable functional units in signal processing instrumentation and wide-band telecommunication links for both civil and military applications. Since photonic systems are capable of high data…

Full-duplex communication has the potential to substantially increase the throughput in wireless networks. However, the benefits of full-duplex are still not well understood. In this paper, we characterize the full-duplex rate gains in both…

In this paper, we investigate hybrid analog/digital beamforming for multiple-input multiple-output (MIMO) systems with low-resolution analog-to-digital converters (ADCs) for millimeter wave (mmWave) communications. In the receiver, we…

Future communication system requires large bandwidth to achieve high data rate up to multigigabit/ sec, which makes analog-to-digital (ADC) become a key bottleneck for the implementation of digital receivers due to its high complexity and…

Network-on-Chip (NoC) is currently the paradigm of choice to interconnect the different components of System-on-Chips (SoCs) or Chip Multiprocessors (CMPs). As the levels of integration continue to grow, however, current NoCs face…

High sampling speed can be achieved using multiple Analog-to-Digital Converters (ADCs) based on the Time-Interleaving A/D Conversion (TIADC) technique. Various types of methods were proposed to correct the mismatch errors among parallel ADC…