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Systolic array has emerged as a prominent architecture for Deep Neural Network (DNN) hardware accelerators, providing high-throughput and low-latency performance essential for deploying DNNs across diverse applications. However, when used…

Artificial Intelligence · Computer Science 2024-03-06 Mahdi Taheri , Masoud Daneshtalab , Jaan Raik , Maksim Jenihhin , Salvatore Pappalardo , Paul Jimenez , Bastien Deveautour , Alberto Bosio

The computation and memory-intensive nature of DNNs limits their use in many mobile and embedded contexts. Application-specific integrated circuit (ASIC) hardware accelerators employ matrix multiplication units (such as the systolic arrays)…

Hardware Architecture · Computer Science 2024-02-02 Ruiqi Sun , Yinchen Ni , Xin He , Jie Zhao , An Zou

The stringent requirements for the Deep Neural Networks (DNNs) accelerator's reliability stand along with the need for reducing the computational burden on the hardware platforms, i.e. reducing the energy consumption and execution time as…

Hardware Architecture · Computer Science 2024-01-19 Mahdi Taheri , Natalia Cherezova , Mohammad Saeed Ansari , Maksim Jenihhin , Ali Mahani , Masoud Daneshtalab , Jaan Raik

Deep neural network (DNN) inference relies increasingly on specialized hardware for high computational efficiency. This work introduces a field-programmable gate array (FPGA)-based dynamically configurable accelerator featuring systolic…

Hardware Architecture · Computer Science 2025-10-10 Anastasios Petropoulos , Theodore Antonakopoulos

Due to their growing popularity and computational cost, deep neural networks (DNNs) are being targeted for hardware acceleration. A popular architecture for DNN acceleration, adopted by the Google Tensor Processing Unit (TPU), utilizes a…

Machine Learning · Computer Science 2018-02-20 Jeff Zhang , Tianyu Gu , Kanad Basu , Siddharth Garg

Recent advances in deep learning have produced highly accurate but increasingly large and complex DNNs, making traditional fault-injection techniques impractical. Accurate fault analysis requires RTL-accurate hardware models. However, this…

Hardware Architecture · Computer Science 2026-02-03 Rafael Billig Tonetto , Marcello Traiola , Fernando Fernandes dos Santos , Angeliki Kritikakou

The systolic accelerator is one of the premier architectural choices for DNN acceleration. However, the conventional systolic architecture suffers from low PE utilization due to the mismatch between the fixed array and diverse DNN…

Hardware Architecture · Computer Science 2024-05-16 Meng Han , Liang Wang , Limin Xiao , Tianhao Cai , Zeyu Wang , Xiangrong Xu , Chenhao Zhang

Systolic arrays are a prominent choice for deep neural network (DNN) accelerators because they offer parallelism and efficient data reuse. Improving the reliability of DNN accelerators is crucial as hardware faults can degrade the accuracy…

Hardware Architecture · Computer Science 2024-02-13 Wei-Kai Liu

As machine learning applications continue to evolve, the demand for efficient hardware accelerators, specifically tailored for deep neural networks (DNNs), becomes increasingly vital. In this paper, we propose a configurable memory…

Hardware Architecture · Computer Science 2024-04-25 Oliver Bause , Paul Palomero Bernardo , Oliver Bringmann

Modern deep learning models have high memory and computation cost. To make them fast and memory-cost efficient, structured model pruning is commonly used. We find that pruning a model using a common training accelerator with large systolic…

Machine Learning · Computer Science 2020-04-29 Sangkug Lym , Mattan Erez

Deep neural networks (DNNs) offer plenty of challenges in executing efficient computation at edge nodes, primarily due to the huge hardware resource demands. The article proposes HYDRA, hybrid data multiplexing, and runtime layer…

Hardware Architecture · Computer Science 2026-03-31 Sonu Kumar , Komal Gupta , Gopal Raut , Mukul Lokhande , Santosh Kumar Vishvakarma

Deep Learning, and in particular, Deep Neural Network (DNN) is nowadays widely used in many scenarios, including safety-critical applications such as autonomous driving. In this context, besides energy efficiency and performance,…

With increasing diversity in Deep Neural Network(DNN) models in terms of layer shapes and sizes, the research community has been investigating flexible/reconfigurable accelerator substrates. This line of research has opened up two…

Hardware Architecture · Computer Science 2022-04-26 Ananda Samajdar , Michael Pellauer , Tushar Krishna

Nowadays, the extensive exploitation of Deep Neural Networks (DNNs) in safety-critical applications raises new reliability concerns. In practice, methods for fault injection by emulation in hardware are efficient and widely used to study…

Machine Learning · Computer Science 2023-06-01 Mahdi Taheri , Mohammad Hasan Ahmadilivani , Maksim Jenihhin , Masoud Daneshtalab , Jaan Raik

Applying deep neural networks (DNNs) in mobile and safety-critical systems, such as autonomous vehicles, demands a reliable and efficient execution on hardware. Optimized dedicated hardware accelerators are being developed to achieve this.…

Machine Learning · Computer Science 2019-10-01 Christoph Schorn , Thomas Elsken , Sebastian Vogel , Armin Runge , Andre Guntoro , Gerd Ascheid

Convolutional Neural Networks (CNNs) are the state-of-the-art solution for many deep learning applications. For maximum scalability, their computation should combine high performance and energy efficiency. In practice, the convolutions of…

Hardware Architecture · Computer Science 2023-06-07 C. Peltekis , D. Filippas , G. Dimitrakopoulos , C. Nicopoulos , D. Pnevmatikatos

Present-day Deep Reinforcement Learning (RL) systems show great promise towards building intelligent agents surpassing human-level performance. However, the computational complexity associated with the underlying deep neural networks (DNNs)…

Machine Learning · Computer Science 2021-09-20 Adarsh Kumar Kosta , Malik Aqeel Anwar , Priyadarshini Panda , Arijit Raychowdhury , Kaushik Roy

Low-latency, energy-efficient deep neural networks (DNNs) inference are critical for edge applications, where traditional cloud-based deployment suffers from high latency and security risks. Field-Programmable Gate Arrays (FPGAs) offer a…

Hardware Architecture · Computer Science 2025-06-10 Zeyu Guo

The research interest in specialized hardware accelerators for deep neural networks (DNN) spikes recently owing to their superior performance and efficiency. However, today's DNN accelerators primarily focus on accelerating specific…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-06-11 Cong Guo , Yangjie Zhou , Jingwen Leng , Yuhao Zhu , Zidong Du , Quan Chen , Chao Li , Bin Yao , Minyi Guo

Hardware failures are a growing challenge for machine learning accelerators, many of which are based on systolic arrays. When a permanent hardware failure occurs in a systolic array, existing solutions include localizing and isolating the…

Machine Learning · Computer Science 2024-12-24 Youssef A. Ait Alama , Sampada Sakpal , Ke Wang , Razvan Bunescu , Avinash Karanth , Ahmed Louri
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