English
Related papers

Related papers: Performance optimization of BLAS algorithms with b…

200 papers

The widespread diffusion of compute-intensive edge-AI workloads and the stringent demands of modern autonomous systems require advanced heterogeneous embedded architectures. Such architectures must support high-performance and reliable…

Hardware Architecture · Computer Science 2024-10-11 Enrico Zelioli , Alessandro Ottaviano , Robert Balas , Nils Wistoff , Angelo Garofalo , Luca Benini

Neural Networks (NNs) have been widely adopted due to their outstanding efficacy and adaptability across computer vision and deep learning applications. The optimization of NNs is necessary to enable their deployment on energy constrained…

Hardware Architecture · Computer Science 2026-05-12 Pragun Jaswal , L. Hemanth Krishna , B. Srinivasu

Deep learning implementations on CPUs (Central Processing Units) are gaining more traction. Enhanced AI capabilities on commodity x86 architectures are commercially appealing due to the reuse of existing hardware and virtualization ease. A…

Machine Learning · Computer Science 2021-03-22 Shabnam Daghaghi , Nicholas Meisburger , Mengnan Zhao , Yong Wu , Sameh Gobriel , Charlie Tai , Anshumali Shrivastava

Edge AI deployment faces critical challenges balancing computational performance, energy efficiency, and resource constraints. This paper presents FPGA-accelerated RISC-V instruction set architecture (ISA) extensions for efficient neural…

Hardware Architecture · Computer Science 2025-11-11 Arya Parameshwara , Santosh Hanamappa Mokashi

Low bit-width Quantized Neural Networks (QNNs) enable deployment of complex machine learning models on constrained devices such as microcontrollers (MCUs) by reducing their memory footprint. Fine-grained asymmetric quantization (i.e.,…

Hardware Architecture · Computer Science 2020-10-09 Gianmarco Ottavi , Angelo Garofalo , Giuseppe Tagliavini , Francesco Conti , Luca Benini , Davide Rossi

Leveraging vectorisation, the ability for a CPU to apply operations to multiple elements of data concurrently, is critical for high performance workloads. However, at the time of writing, commercially available physical RISC-V hardware that…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-04-21 Joseph K. L. Lee , Maurice Jamieson , Nick Brown

ARM SVE and RISC-V RVV are emerging vector architectures in high-end processors that support vectorization of flexible vector length. In this work, we leverage an important workload for quantum computing, quantum state-vector simulations,…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-03-16 Ruimin Shi , Gabin Schieffer , Pei-Hung Lin , Maya Gokhale , Andreas Herten , Ivy Peng

One of the biggest concerns in IoT is privacy and security. Encryption and authentication need big power budgets, which battery-operated IoT end-nodes do not have. Hardware accelerators designed for specific cryptographic operations provide…

Hardware Architecture · Computer Science 2020-10-01 Ömer Faruk Irmak , Arda Yurdakul

This work introduces CLBlast, an open-source BLAS library providing optimized OpenCL routines to accelerate dense linear algebra for a wide variety of devices. It is targeted at machine learning and HPC applications and thus provides a fast…

Mathematical Software · Computer Science 2018-04-30 Cedric Nugteren

The burgeoning RISC-V ecosystem necessitates efficient verification methodologies for complex processors. Traditional approaches often struggle to concurrently evaluate functional correctness and performance, or balance simulation speed…

Hardware Architecture · Computer Science 2025-05-16 Ruizhi Qiu , Yang Liu

Bloom filters are a fundamental data structure for approximate membership queries, with applications ranging from data analytics to databases and genomics. Several variants have been proposed to accommodate parallel architectures. GPUs,…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-18 Daniel Jünger , Kevin Kristensen , Yunsong Wang , Xiangyao Yu , Bertil Schmidt

RISC-V, an open instruction set architecture, is getting the attention of soft processor developers. Implementing only a basic 32-bit integer instruction set of RISC-V, which is defined as RV32I, might be satisfactory for embedded systems.…

Hardware Architecture · Computer Science 2020-11-02 Md Ashraful Islam , Hiromu Miyazaki , Kenji Kise

Nowadays, various memory-hungry applications like machine learning algorithms are knocking "the memory wall". Toward this, emerging memories featuring computational capacity are foreseen as a promising solution that performs data process…

Hardware Architecture · Computer Science 2023-03-28 Jia-Hui Su , Chen-Hua Lu , Jenq Kuen Lee , Andrea Coluccio , Fabrizio Riente , Marco Vacca , Marco Ottavi , Kuan-Hsun Chen

Modern GPUs are able to perform significantly more arithmetic operations than transfers of a single word to or from global memory. Hence, many GPU kernels are limited by memory bandwidth and cannot exploit the arithmetic power of GPUs.…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-09-13 J. Filipovič , M. Madzin , J. Fousek , L. Matyska

The objective of our research is to demonstrate the practical usage and orders of magnitude speedup of real-world applications by using alternative technologies to support high performance computing. Currently, the main barrier to the…

Astrophysics · Physics 2007-11-22 Robert J. Brunner , Volodymyr V. Kindratenko , Adam D. Myers

Flexible electronics offer unique advantages for conformable, lightweight, and disposable healthcare wearables. However, their limited gate count, large feature sizes, and high static power consumption make on-body machine learning…

Machine Learning · Computer Science 2025-11-11 Theofanis Vergos , Polykarpos Vergos , Mehdi B. Tahoori , Georgios Zervakis

In this paper, we propose a high-performance RISC-V soft processor with an efficient fetch unit supporting the compressed instructions targeting on FPGA. The compressed instruction extension in RISC-V can reduce the program size by about…

Hardware Architecture · Computer Science 2020-11-24 Takuto Kanamori , Hiromu Miyazaki , Kenji Kise

Compared to the first generation of deep neural networks, dominated by regular, compute-intensive kernels such as matrix multiplications (MatMuls) and convolutions, modern decoder-based transformers interleave attention, normalization, and…

Hardware Architecture · Computer Science 2026-03-06 Max Wipfli , Gamze İslamoğlu , Navaneeth Kunhi Purayil , Angelo Garofalo , Luca Benini

Basic Linear Algebra Subprograms (BLAS) are a set of low level linear algebra kernels widely adopted by applications involved with the deep learning and scientific computing. The massive and economic computing power brought forth by the…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-10-20 Linnan Wang , Wei Wu , Jianxiong Xiao , Yi Yang

RISC-V open-source systems are emerging in deployment scenarios where safety and security are critical. OpenTitan is an open-source silicon root-of-trust designed to be deployed in a wide range of systems, from high-end to deeply embedded…

Cryptography and Security · Computer Science 2024-02-19 Emanuele Parisi , Alberto Musa , Maicol Ciani , Francesco Barchi , Davide Rossi , Andrea Bartolini , Andrea Acquaviva
‹ Prev 1 3 4 5 6 7 10 Next ›