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The detector of TRopIcal DEep-sea Neutrino Telescope (TRIDENT) will use large-area silicon photomultiplier (SiPM) arrays combined with photomultiplier tubes to boost photon detection efficiency and pointing capability. An…

Instrumentation and Detectors · Physics 2025-02-06 M. X. Wang , Y. Liu , Y. Q. Tan , J. N. Tang , W. H. Wu , D. L. Xu , W. Zhi , Z. Z. Zhou

Cell-free massive multiple-input multiple-output (MIMO)-aided integrated sensing and communication (ISAC) systems are investigated where distributed access points jointly serve users and sensing targets. We demonstrate that only a subset of…

Information Theory · Computer Science 2025-07-15 Nguyen Xuan Tung , Le Tung Giang , Trinh Van Chien , Hoang Trong Minh , Lajos Hanzo

Integrated sensing and communication (ISAC), as a technology enabled seamless connection between communication and sensing, is regarded a core enabling technology for these applications. However, the accuracy of single-node sensing in ISAC…

Signal Processing · Electrical Eng. & Systems 2025-07-01 Haotian Liu , Zhiqing Wei , Luyang Sun , Ruizhong Xu , Yixin Zhang , Zhiyong Feng

Massive multiuser (MU) multiple-input multiple-output (MIMO) enables concurrent transmission of multiple users to a multi-antenna basestation (BS). To detect the users' data using linear equalization, the BS must perform preprocessing,…

Signal Processing · Electrical Eng. & Systems 2024-10-18 Darja Nonaca , Christoph Studer

In order to mitigate the problem of data congestion, increased latency, and high energy consumption in Wireless Sensor Networks (WSNs), Mobile Agent (MA) has been proven to be a viable alternative to the traditional client-server data…

Networking and Internet Architecture · Computer Science 2021-02-16 Huthiafa Q Qadori , Zuriati Ahmad Zukarnain , Zurina Mohd Hanapi , Shamala Subramaniam , Mohamed A. Alrshah

Numerical codes that require arbitrary precision floating point (APFP) numbers for their core computation are dominated by elementary arithmetic operations due to the super-linear complexity of multiplication in the number of mantissa bits.…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-04-14 Johannes de Fine Licht , Christopher A. Pattison , Alexandros Nikolaos Ziogas , David Simmons-Duffin , Torsten Hoefler

This paper presents a mixed-signal neuromorphic accelerator architecture designed for accelerating inference with event-based neural network models. This fully CMOS-compatible accelerator utilizes analog computing to emulate synapse and…

Hardware Architecture · Computer Science 2024-10-14 Armin Abdollahi , Mehdi Kamal , Massoud Pedram

Lossless compression imposes significant computational over head on datacenters when performed on CPUs. Hardware compression and decompression processing units (CDPUs) can alleviate this overhead, but optimal algorithm selection,…

Hardware Architecture · Computer Science 2025-09-30 Tao Lu , Jiapin Wang , Yelin Shan , Xiangping Zhang , Xiang Chen

Stacked intelligent metasurfaces (SIM) is a revolutionary technology, which can outperform its single-layer counterparts by performing advanced signal processing relying on wave propagation. In this work, we exploit SIM to enable transmit…

Generative Recommendation (GR) has recently transitioned from atomic item-indexing to Semantic ID (SID)-based frameworks to capture intrinsic item relationships and enhance generalization. However, the adoption of high-granularity SIDs…

Information Retrieval · Computer Science 2026-04-08 Tianyu Zhan , Kairui Fu , Chengfei Lv , Zheqi Lv , Shengyu Zhang

Modern microprocessors extend their instruction set architecture (ISA) with Single Instruction, Multiple Data (SIMD) operations to improve performance. The Intel Advanced Vector Extensions (AVX) enhance the x86 ISA and are widely supported…

Hardware Architecture · Computer Science 2025-11-27 Laslo Hunhold

Developing accurate and reliable Compute-In-Memory (CIM) architectures is becoming a key research focus to accelerate Artificial Intelligence (AI) tasks on hardware, particularly Deep Neural Networks (DNNs). In that regard, there has been…

Hardware Architecture · Computer Science 2026-04-15 Omar Numan , Gaurav Singh , Kazybek Adam , Jelin Leslin , Aleksi Korsman , Otto Simola , Marko Kosunen , Jussi Ryynänen , Martin Andraud

In this paper, we explore cooperative sensing and communication within cell-free integrated sensing and communication (ISAC) systems. Specifically, multiple transmit access points (APs) collaboratively serve multiple communication users…

Signal Processing · Electrical Eng. & Systems 2025-02-17 Rang Liu , Ming Li , Qian Liu

Integrated sensing and communication (ISAC) has emerged as a transformative paradigm, enabling situationally aware and perceptive next-generation wireless networks through the co-design of shared network resources. With the adoption of…

Signal Processing · Electrical Eng. & Systems 2025-05-20 Ahmed Hussain , Asmaa Abdallah , Abdulkadir Celik , Ahmed M. Eltawil

Data-parallel applications, such as data analytics, machine learning, and scientific computing, are placing an ever-growing demand on floating-point operations per second on emerging systems. With increasing integration density, the quest…

Hardware Architecture · Computer Science 2020-10-09 Florian Zaruba , Fabian Schuiki , Torsten Hoefler , Luca Benini

This paper presents SleepViT, a custom accelerator ASIC for real-time, low-power sleep stage classification in wearable devices. At the core of SleepViT is a lightweight vision transformer model specifically optimized for…

Signal Processing · Electrical Eng. & Systems 2025-09-08 Tristan Robitaille , Xilin Liu

This paper addresses the problem of scalability for a cell-free massive MIMO (CF-mMIMO) system that performs integrated sensing and communications (ISAC). Specifically, the case where a large number of access points (APs) are deployed to…

Information Theory · Computer Science 2024-06-10 Stefano Buzzi , Carmen D'Andrea , Sergi Liesegang

Advanced driver-assistance systems (ADAS) require neural compute engines that deliver low-latency inference under strict power and area constraints. Posit arithmetic is attractive for such accelerators because it provides high numerical…

Hardware Architecture · Computer Science 2026-05-11 Mukul Lokhande , Ratko Pilipovic , Omkar Kokane , Adam Teman , Santosh Kumar Vishvakarma

To meet the computational requirements of modern workloads under tight energy constraints, general-purpose accelerator architectures have to integrate an ever-increasing number of extremely area- and energy-efficient processing elements…

Hardware Architecture · Computer Science 2025-11-11 Luca Colagrande , Luca Benini

Recognizing the explosive increase in the use of AI-based applications, several industrial companies developed custom ASICs (e.g., Google TPU, IBM RaPiD, Intel NNP-I/NNP-T) and constructed a hyperscale cloud infrastructure with them. These…

Hardware Architecture · Computer Science 2025-03-03 Seock-Hwan Noh , Seungpyo Lee , Banseok Shin , Sehun Park , Yongjoo Jang , Jaeha Kung