Related papers: Improving and benchmarking NISQ qubit routers
We study the status of fair sampling on Noisy Intermediate Scale Quantum (NISQ) devices, in particular the IBM Q family of backends. Using the recently introduced Grover Mixer-QAOA algorithm for discrete optimization, we generate fair…
Noisy intermediate-scale quantum (NISQ) devices pave the way to implement quantum algorithms that exhibit supremacy over their classical counterparts. Due to the intrinsic noise and decoherence in the physical system, NISQ computations are…
Current quantum devices typically lack full qubit connectivity, making it difficult to directly execute logical circuits on quantum devices. This limitation necessitates quantum circuit mapping algorithms to insert SWAP gates, dynamically…
In near-term quantum computing devices, connectivity between qubits remain limited by architectural constraints. A computational circuit with given connectivity requirements necessary for multi-qubit gates have to be embedded within…
Fault-tolerant quantum computing demands many qubits with long lifetimes to conduct accurate quantum gate operations. However, external noise limits the computing time of physical qubits. Quantum error correction codes may extend such…
Currently available quantum computers, so called Noisy Intermediate-Scale Quantum (NISQ) devices, are characterized by relatively low number of qubits and moderate gate fidelities. In such scenario, the implementation of quantum error…
This paper addresses quantum circuit mapping for Noisy Intermediate-Scale Quantum (NISQ) computers. Since NISQ computers constraint two-qubit operations on limited couplings, an input circuit must be transformed into an equivalent output…
Quantum circuit transformation (QCT), necessary for adapting any quantum circuit to the qubit connectivity constraints of the NISQ device, often introduces numerous additional SWAP gates into the original circuit, increasing the circuit…
Designing efficient quantum processor topologies is pivotal for advancing scalable quantum computing architectures. The communication overhead, a critical factor affecting the execution fidelity of quantum circuits, arises from inevitable…
We present a simple, malleable and low-overhead approach for improving generic biased quantum error mitigation (QEM) methods, achieving up to 15% fidelity improvements over standard QEM on 100-qubit circuits with up to 2000 entangling…
Noisy, Intermediate Scale Quantum (NISQ) computers have reached the point where they can show the potential for quantum advantage over classical computing. Unfortunately, NISQ machines introduce sufficient noise that even for moderate size…
The implementation of quantum gates with fidelities that exceed the threshold for reliable quantum computing requires robust gates whose performance is not limited by the precision of the available control fields. The performance of these…
Quantum machine learning offers promising advantages for classification tasks, but noise, decoherence, and connectivity constraints in current devices continue to limit the efficient execution of feature map-based circuits. Gate Assessment…
One of the outstanding challenges in contemporary science and technology is building a quantum computer that is useful in applications. By starting from an estimate of the algorithm success rate, we can explicitly connect gate fidelity to…
Recently, several groups have demonstrated two-qubit gate fidelities in semiconductor spin qubit systems above 99%. Achieving this regime of fault-tolerant compatible high fidelities is nontrivial and requires exquisite stability and…
Current technological advancements of quantum computers highlight the need for application-driven, practical and well-defined methods of benchmarking their performance. As the existing NISQ device's quality of two-qubit gate errors rate is…
We examine how dissipation and gate timing errors affect the fidelity of a sequence of SWAP gates on a chain of interacting qubits in comparison to noise in the interqubit interaction. Although interqubit interaction noise and gate timing…
Quantum devices in the Noisy Intermediate-Scale Quantum (NISQ) era are limited by high error rates and short decoherence times. Typically, compiler optimisations have provided solutions at the gate level. Alternatively, we exploit the…
The transition from monolithic to distributed multi-chip quantum architectures has fundamentally altered the circuit compilation landscape, introducing challenges in managing temporal noise variations and minimizing expensive inter-chip…
One of the key compilation steps in Quantum Computing (QC) is to determine an initial logical to physical mapping of the qubits used in a quantum circuit. The impact of the starting qubit layout can vastly affect later scheduling and…