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Software messaging frameworks help avoid errors and reduce engineering efforts in building distributed systems by (1) providing an interface definition language (IDL) to specify precisely the structure of the message (i.e., the message…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-09-11 Sizhuo Zhang , Hari Angepat , Derek Chiou

Data protection is a severe constraint in the heterogeneous IoT era. This article presents a Hardware-Software Co-Simulation of AES-128 bit encryption and decryption for IoT Edge devices using the Xilinx System Generator (XSG). VHDL…

Cryptography and Security · Computer Science 2021-11-30 Kusum Lata , Surbhi Chhabra , Sandeep Saini

The burgeoning RISC-V ecosystem necessitates efficient verification methodologies for complex processors. Traditional approaches often struggle to concurrently evaluate functional correctness and performance, or balance simulation speed…

Hardware Architecture · Computer Science 2025-05-16 Ruizhi Qiu , Yang Liu

Modern SoC-FPGA that consists of FPGA with embedded ARM cores is being popularized as an embedded vision system platform. However, the design approach of SoC-FPGA applications still follows traditional hardware-software separate workflow,…

Other Computer Science · Computer Science 2015-09-02 Shaodong Qin , Mladen Berekovic

Specialized image processing accelerators are necessary to deliver the performance and energy efficiency required by important applications in computer vision, computational photography, and augmented reality. But creating,…

Software Engineering · Computer Science 2016-11-01 Jing Pu , Steven Bell , Xuan Yang , Jeff Setter , Stephen Richardson , Jonathan Ragan-Kelley , Mark Horowitz

Parallel computing is a standard approach to achieving high-performance computing (HPC). Three commonly used methods to implement parallel computing include: 1) applying multithreading technology on single-core or multi-core CPUs; 2)…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-09-18 Xinyao Yi

The increasing complexity in today's systems and the limited market times demand new development tools for FPGA. Currently, in addition to traditional hardware description languages (HDLs), there are high-level synthesis (HLS) tools that…

Hardware Architecture · Computer Science 2020-12-16 Roberto Millon , Emmanuel Frati , Enzo Rucci

Although software and firmware co-simulation is gaining popularity, it is still not widely used in the FPGA designs. This work presents easy and structured approach for software and firmware co-simulation for bus centric designs. The…

Other Computer Science · Computer Science 2021-10-22 Michał Kruszewski

Graphics processing units (GPU) had evolved from a specialized hardware capable to render high quality graphics in games to a commodity hardware for effective processing blocks of data in a parallel schema. This evolution is particularly…

Distributed, Parallel, and Cluster Computing · Computer Science 2012-03-26 Luis Cabellos

The capacity and programmability of reconfigurable hardware such as FPGAs has improved steadily over the years, but they do not readily provide any mechanisms for monitoring or debugging running programs. Such mechanisms need to be written…

The rapid advancements in artificial intelligence (AI), particularly the Large Language Models (LLMs), have profoundly affected our daily work and communication forms. However, it is still a challenge to deploy LLMs on resource-constrained…

Hardware Architecture · Computer Science 2025-03-03 Mingqiang Huang , Ao Shen , Kai Li , Haoxiang Peng , Boyu Li , Yupeng Su , Hao Yu

Recent advances in reprogrammable hardware (e.g., FPGAs) and memory technology (e.g., DDR4, HBM) promise to solve performance problems inherent to graph processing like irregular memory access patterns on traditional hardware (e.g., CPU).…

Hardware Architecture · Computer Science 2021-04-19 Jonas Dann , Daniel Ritter , Holger Fröning

In this work, we propose an architecture and methodology to design hardware/software systems for high-performance embedded computing on FPGA. The hardware side is based on a many-core architecture whose design is generated automatically…

Hardware Architecture · Computer Science 2015-08-28 Mário P. Véstias , Rui Policarpo Duarte , Horácio C. Neto

Scaling up hardware systems has become an important tactic for improving performance as Moore's law fades. Unfortunately, simulations of large hardware systems are often a design bottleneck due to slow throughput and long build times. In…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-07-31 Steven Herbst , Noah Moroze , Edgar Iglesias , Andreas Olofsson

In this paper, we introduce a software-defined framework that enables the parallel utilization of all the programmable processing resources available in heterogeneous system-on-chip (SoC) including FPGA-based hardware accelerators and…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-02-12 Jose Nunez-Yanez , Mohammad Hosseinabady , Moslem Amiri , Andrés Rodríguez , Rafael Asenjo , Angeles Navarro , Rubén Gran-Tejero , Darío Suárez-Gracia

Dynamic programming (DP) based algorithms are essential yet compute-intensive parts of numerous bioinformatics pipelines, which typically involve populating a 2-D scoring matrix based on a recursive formula, optionally followed by a…

Hardware Architecture · Computer Science 2024-11-07 Yingqi Cao , Anshu Gupta , Jason Liang , Yatish Turakhia

Feature detection is a common yet time-consuming module in Simultaneous Localization and Mapping (SLAM) implementations, which are increasingly deployed on power-constrained platforms, such as drones. Graphics Processing Units (GPUs) have…

Computer Vision and Pattern Recognition · Computer Science 2025-10-16 Ruiqi Ye , Mikel Luján

Modern physics experiments often utilize FPGA-based systems for real-time data acquisition. Integrated analog electronics demand for complex calibration routines. Furthermore, versatile configuration and control of the whole system is a key…

Systems and Control · Electrical Eng. & Systems 2021-09-01 Nick Karcher , Richard Gebauer , Robin Bauknecht , Rainer Illichmann , Oliver Sander

Networks-on-Chips (NoCs) recently became widely used, from multi-core CPUs to edge-AI accelerators. Emulation on FPGAs promises to accelerate their RTL modeling compared to slow simulations. However, realistic test stimuli are challenging…

Hardware Architecture · Computer Science 2022-06-24 Yee Yang Tan , Felix Staudigl , Lukas Jünger , Anna Drewes , Rainer Leupers , Jan Moritz Joseph