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Multiplication is arguably the most cost-dominant operation in modern deep neural networks (DNNs), limiting their achievable efficiency and thus more extensive deployment in resource-constrained applications. To tackle this limitation,…

Hardware Architecture · Computer Science 2022-12-20 Huihong Shi , Haoran You , Yang Zhao , Zhongfeng Wang , Yingyan Lin

The use of low numerical precision is a fundamental optimization included in modern accelerators for Deep Neural Networks (DNNs). The number of bits of the numerical representation is set to the minimum precision that is able to retain…

Signal Processing · Electrical Eng. & Systems 2019-11-12 Franyell Silfa , Jose-Maria Arnau , Antonio Gonzàlez

Deep neural network (DNN) accelerators with improved energy and delay are desirable for meeting the requirements of hardware targeted for IoT and edge computing systems. Convolutional neural networks (CoNNs) belong to one of the most…

Computer Vision and Pattern Recognition · Computer Science 2019-05-06 Qiuwen Lou , Chenyun Pan , John McGuiness , Andras Horvath , Azad Naeemi , Michael Niemier , X. Sharon Hu

Recent years have seen an increased interest in large-scale analytical dataflows on non-relational data. These dataflows are compiled into execution graphs scheduled on large compute clusters. In many novel application areas the predominant…

Databases · Computer Science 2013-11-26 Astrid Rheinländer , Arvid Heise , Fabian Hueske , Ulf Leser , Felix Naumann

The recent breakthroughs in deep neural networks (DNNs) have spurred a tremendously increased demand for DNN accelerators. However, designing DNN accelerators is non-trivial as it often takes months/years and requires cross-disciplinary…

Machine Learning · Computer Science 2021-04-19 Yang Zhao , Chaojian Li , Yue Wang , Pengfei Xu , Yongan Zhang , Yingyan Lin

A low-latency and energy-efficient tensor algebra accelerator design must optimize how data movement and operations are scheduled (i.e., mapped) in the accelerator architecture. A key mapping optimization is fusion, meaning holding data…

Hardware Architecture · Computer Science 2026-05-05 Tanner Andrulis , Michael Gilbert , Vivienne Sze , Joel S. Emer

A novel signaling design for secure transmission over two-user multiple-input multiple-output non-orthogonal multiple access channel using deep neural networks (DNNs) is proposed. The goal of the DNN is to form the covariance matrix of…

Information Theory · Computer Science 2021-10-15 Jordan Pauls , Mojtaba Vaezi

Emerging multi-model workloads with heavy models like recent large language models significantly increased the compute and memory demands on hardware. To address such increasing demands, designing a scalable hardware architecture became a…

Hardware Architecture · Computer Science 2024-09-17 Mohanad Odema , Luke Chen , Hyoukjun Kwon , Mohammad Abdullah Al Faruque

Most of the existing work on FPGA acceleration of Convolutional Neural Network (CNN) focus on employing a single strategy (algorithm, dataflow, etc.) across all the layers. Such an approach does not achieve optimal latency on complex and…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-03-16 Yuan Meng , Sanmukh Kuppannagari , Rajgopal Kannan , Viktor Prasanna

A non-orthogonal multiple access (NOMA) assisted semi-grant-free (SGF) framework is proposed to enable channel access for grant-free users (GFUs) by using residual resources from grant-based users. Under this framework, the problem of joint…

Signal Processing · Electrical Eng. & Systems 2025-08-18 Yuqin Liu , Mona Jaber , Yan Liu , Arumugam Nallanathan

Customized hardware accelerators have been developed to provide improved performance and efficiency for DNN inference and training. However, the existing hardware accelerators may not always be suitable for handling various DNN models as…

Hardware Architecture · Computer Science 2021-04-07 Xiaofan Zhang , Hanchen Ye , Deming Chen

Efficient load-balancing mechanisms are critical for maximizing performance and increasing the quality of service (QoS) of data center networks (DCNs). Obtaining the optimal QoS while minimizing resource consumption remains a significant…

Networking and Internet Architecture · Computer Science 2026-01-15 Aymen Hasan Alawadi

With increasing data and model complexities, the time required to train neural networks has become prohibitively large. To address the exponential rise in training time, users are turning to data parallel neural networks (DPNN) to utilize…

Machine Learning · Computer Science 2022-02-09 Daniel Coquelin , Charlotte Debus , Markus Götz , Fabrice von der Lehr , James Kahn , Martin Siggel , Achim Streit

Diffusion Transformers have become a dominant paradigm in visual generation, yet their low inference efficiency remains a key bottleneck hindering further advancement. Among common training-free techniques, caching offers high acceleration…

Computer Vision and Pattern Recognition · Computer Science 2026-03-25 Tong Shao , Yusen Fu , Guoying Sun , Jingde Kong , Zhuotao Tian , Jingyong Su

Two distinguishing features of state-of-the-art mobile and autonomous systems are 1) there are often multiple workloads, mainly deep neural network (DNN) inference, running concurrently and continuously; and 2) they operate on shared memory…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-02-08 Ismet Dagli , Mehmet Belviranli

The computational requirements for training deep neural networks (DNNs) have grown to the point that it is now standard practice to parallelize training. Existing deep learning systems commonly use data or model parallelism, but…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-07-23 Zhihao Jia , Matei Zaharia , Alex Aiken

Multi-pod systolic arrays are emerging as the architecture of choice in DNN inference accelerators. Despite their potential, designing multi-pod systolic arrays to maximize effective throughput/Watt (i.e., throughput/Watt adjusted when…

Hardware Architecture · Computer Science 2022-03-23 Ahmet Caner Yüzügüler , Canberk Sönmez , Mario Drumond , Yunho Oh , Babak Falsafi , Pascal Frossard

Switches-based hybrid architecture has attracted much attention, especially in directional-of-arrival (DOA) sensing, due to its ability of significantly reducing the hardware cost by compressing massive multiple-input multiple-output (MIMO)…

Signal Processing · Electrical Eng. & Systems 2025-01-14 Yifan Li , Kang Wei , Linqiong Jia , Jun Zou , Feng Shu , Yaoliang Song , Jiangzhou Wang

Network capacity calls for significant increase for 5G cellular systems. A promising multi-user access scheme, non-orthogonal multiple access (NOMA) with successive interference cancellation (SIC), is currently under consideration. In NOMA,…

Information Theory · Computer Science 2016-11-18 Lei Lei , Di Yuan , Chin Keong Ho , Sumei Sun

The evolution of Large Language Model (LLM) serving towards complex, distributed architectures--specifically the P/D-separated, large-scale DP+EP paradigm--introduces distinct scheduling challenges. Unlike traditional deployments where…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-19 Jian Tian , Shuailong Li , Yang Cao , Wenbo Cui , Minghan Zhu , Wenkang Wu , Jianming Zhang , Yanpeng Wang , Zhiwen Xiao , Zhenyu Hou , Dou Shen