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Sparse-dense linear algebra is crucial in many domains, but challenging to handle efficiently on CPUs, GPUs, and accelerators alike; multiplications with sparse formats like CSR and CSF require indirect memory lookups. In this work, we…

Hardware Architecture · Computer Science 2020-12-15 Paul Scheffler , Florian Zaruba , Fabian Schuiki , Torsten Hoefler , Luca Benini

Molecular dynamics models materials by simulating each individual particle's trajectory. Many-body potentials lead to a more accurate trajectory simulation, and are used in materials science and computational chemistry. We present…

Computational Engineering, Finance, and Science · Computer Science 2017-10-04 Markus Höhnerbach , Ahmed E. Ismail , Paolo Bientinesi

Retrieval-Augmented Generation (RAG) systems combine vector similarity search with large language models (LLMs) to deliver accurate, context-aware responses. However, co-locating the vector retriever and the LLM on shared GPU infrastructure…

Machine Learning · Computer Science 2026-01-21 Junkyum Kim , Divya Mahajan

Vector search and database systems have become a keystone component in many AI applications. While many prior research has investigated how to accelerate the performance of generic vector search, emerging AI applications require running…

Databases · Computer Science 2025-06-03 Jingyi Xi , Chenghao Mo , Benjamin Karsin , Artem Chirkin , Mingqin Li , Minjia Zhang

The rapid advancements in artificial intelligence (AI), particularly the Large Language Models (LLMs), have profoundly affected our daily work and communication forms. However, it is still a challenge to deploy LLMs on resource-constrained…

Hardware Architecture · Computer Science 2025-03-03 Mingqiang Huang , Ao Shen , Kai Li , Haoxiang Peng , Boyu Li , Yupeng Su , Hao Yu

The evolution of ARM-based architectures, particularly those incorporating Scalable Vector Extension (SVE), has introduced transformative opportunities for high-performance computing (HPC) and machine learning (ML) workloads. The Unified…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-04-08 Chandan Sharma , Rakshith GB , Ajay Kumar Patel , Dhanus M Lal , Darshan Patel , Ragesh Hajela , Masahiro Doteguchi , Priyanka Sharma

Deploying deep neural networks (DNNs) on those resource-constrained edge platforms is hindered by their substantial computation and storage demands. Quantized multi-precision DNNs, denoted as MP-DNNs, offer a promising solution for these…

Hardware Architecture · Computer Science 2024-10-10 Chuanning Wang , Chao Fang , Xiao Wu , Zhongfeng Wang , Jun Lin

Modern AI workloads such as large language models (LLMs) and retrieval-augmented generation (RAG) impose severe demands on memory, communication bandwidth, and resource flexibility. Traditional GPU-centric architectures struggle to scale…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-15 Myoungsoo Jung

RWKV is a modern RNN architecture that approaches the performance of Transformers, with the advantage of processing long contexts at a linear memory cost. However, its sequential computation pattern struggles to efficiently leverage GPU…

Hardware Architecture · Computer Science 2026-01-06 Liu Shijie , Zeng Zhenghao , Jiao Han , Huang Yihua

Leveraging vectorisation, the ability for a CPU to apply operations to multiple elements of data concurrently, is critical for high performance workloads. However, at the time of writing, commercially available physical RISC-V hardware that…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-04-21 Joseph K. L. Lee , Maurice Jamieson , Nick Brown

Extended reality (XR) applications are Machine Learning (ML)-intensive, featuring deep neural networks (DNNs) with millions of weights, tightly latency-bound (10-20 ms end-to-end), and power-constrained (low tens of mW average power). While…

Most modern processors contain vector units that simultaneously perform the same arithmetic operation over multiple sets of operands. The ability of compilers to automatically vectorize code is critical to effectively using these units.…

Performance · Computer Science 2025-02-21 Nazmus Sakib , Tarun Prabhu , Nandakishore Santhi , John Shalf , Abdel-Hameed A. Badawy

Edge and mobile platforms for augmented and virtual reality, collectively referred to as extended reality (XR) must deliver deterministic ultra-low-latency performance under stringent power and area constraints. However, the diversity of XR…

Hardware Architecture · Computer Science 2026-01-16 Xinyu Shi , Simei Yang , Francky Catthoor

The demand for energy-efficient and high performance embedded systems drives the evolution of new hardware architectures, including concepts like approximate computing. This paper presents a novel reconfigurable embedded platform named…

Hardware Architecture · Computer Science 2024-10-02 Arvin Delavari , Faraz Ghoreishy , Hadi Shahriar Shahhoseini , Sattar Mirzakuchaki

During early stages of CPU design, benchmarks can only run on simulators to evaluate CPU performance. However, most big data benchmarks are too huge at code size scale, which causes them to be unable to finish running on simulators at an…

Performance · Computer Science 2023-09-20 Yikang Yang , Lei Wang , Jianfeng Zhan

Modern high-performance computing architectures (Multicore, GPU, Manycore) are based on tightly-coupled clusters of processing elements, physically implemented as rectangular tiles. Their size and aspect ratio strongly impact the achievable…

Hardware Architecture · Computer Science 2022-09-05 Gianna Paulin , Matheus Cavalcante , Paul Scheffler , Luca Bertaccini , Yichao Zhang , Frank Gürkaynak , Luca Benini

Virtualization is a key technology used in a wide range of applications, from cloud computing to embedded systems. Over the last few years, mainstream computer architectures were extended with hardware virtualization support, giving rise to…

Hardware Architecture · Computer Science 2023-08-07 Bruno Sá , Luca Valente , José Martins , Davide Rossi , Luca Benini , Sandro Pinto

Single-issue processor cores are very energy efficient but suffer from the von Neumann bottleneck, in that they must explicitly fetch and issue the loads/storse necessary to feed their ALU/FPU. Each instruction spent on moving data is a…

Hardware Architecture · Computer Science 2020-04-02 Fabian Schuiki , Florian Zaruba , Torsten Hoefler , Luca Benini

The A64FX CPU powers the current number one supercomputer on the Top500 list. Although it is a traditional cache-based multicore processor, its peak performance and memory bandwidth rival accelerator devices. Generating efficient code for…

Performance · Computer Science 2021-08-05 Christie L. Alappat , Jan Laukemann , Thomas Gruber , Georg Hager , Gerhard Wellein , Nils Meyer , Tilo Wettig

Synchronization is likely the most critical performance killer in shared-memory parallel programs. With the rise of multi-core and many-core processors, the relative impact on performance and energy overhead of synchronization is bound to…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-07-21 Marco Bertuletti , Samuel Riedel , Yichao Zhang , Alessandro Vanelli-Coralli , Luca Benini
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