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Network coding can significantly improve the transmission rate of communication networks with packet loss compared with routing. However, using network coding usually incurs high computational and storage costs in the network devices and…

Information Theory · Computer Science 2014-10-13 Shenghao Yang , Raymond W. Yeung

Batched sparse (BATS) code is a class of batched network code that can achieve a close-to-optimal rate when an optimal degree distribution is provided. We observed that most probability masses in this optimal distribution are very small,…

Information Theory · Computer Science 2024-10-08 Hoover H. F. Yin , Jie Wang

Batched sparse (BATS) code is a promising technology for reliable data transmission in multi-hop wireless networks. As a BATS code consists of an outer code and an inner code that typically is a random linear network code, one main research…

Information Theory · Computer Science 2017-09-05 Zhiheng Zhou , Congduan Li , Shenghao Yang , Xuan Guang

Batched sparse (BATS) code is a network coding solution for multi-hop wireless networks with packet loss. Achieving a close-to-optimal rate relies on an optimal degree distribution. Technical challenges arise from the sensitivity of this…

Information Theory · Computer Science 2024-05-15 Hoover H. F. Yin , Jie Wang , Sherman S. M. Chow

In coding theory, codes are usually designed with a certain level of randomness to facilitate analysis and accommodate different channel conditions. However, the resulting random code constructed can be suboptimal in practical…

Information Theory · Computer Science 2024-06-27 Jiaxin Qing , Xiaohong Cai , Yijun Fan , Mingyang Zhu , Raymond W. Yeung

BATS (BATched Sparse) codes are a class of efficient random linear network coding variation that has been studied for multihop wireless networks mostly in scenarios of a single communication flow. Towards sophisticated multi-flow network…

Information Theory · Computer Science 2021-09-16 Yanyan Dong , Sheng Jin , Yanzuo Chen , Shenghao Yang , Hoover H. F. Yin

With the development of hardware-optimized deployment of spiking neural networks (SNNs), SNN processors based on field-programmable gate arrays (FPGAs) have become a research hotspot due to their efficiency and flexibility. However,…

Neural and Evolutionary Computing · Computer Science 2026-01-06 Hou Yue , Xiang Shuiying , Zou Tao , Huang Zhiquan , Shi Shangxuan , Guo Xingxing , Zhang Yahui , Zheng Ling , Hao Yue

Recent hardware acceleration advances have enabled powerful specialized accelerators for finite element computations, spiking neural network inference, and sparse tensor operations. However, existing approaches face fundamental limitations:…

Hardware Architecture · Computer Science 2026-01-09 Chuanzhen Wang , Leo Zhang , Eric Liu

BATS codes were proposed for communication through networks with packet loss. A BATS code consists of an outer code and an inner code. The outer code is a matrix generation of a fountain code, which works with the inner code that comprises…

Information Theory · Computer Science 2016-02-15 Shenghao Yang , Tsz-Ching Ng , Raymond W. Yeung

Batched sparse (BATS) codes were proposed as a reliable communication solution for networks with packet loss. In the finite-length regime, the error probability of BATS codes under belief propagation (BP) decoding has been studied in the…

Information Theory · Computer Science 2025-02-12 Mingyang Zhu , Shenghao Yang , Ming Jiang , Chunming Zhao

In this paper, we consider the wireless broadcasting scenario with a source node sending some common information to a group of closely located users, where each link is subject to certain packet erasures. To ensure reliable information…

Information Theory · Computer Science 2015-04-20 Xiaoli Xu , Praveen Kumar M. Gandhi , Yong Liang Guan , Peter Han Joo Chong

FPGA-based hardware accelerators for convolutional neural networks (CNNs) have obtained great attentions due to their higher energy efficiency than GPUs. However, it is challenging for FPGA-based solutions to achieve a higher throughput…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-06-09 Yixing Li , Zichuan Liu , Kai Xu , Hao Yu , Fengbo Ren

The capacity of line networks with buffer size constraints is an open, but practically important problem. In this paper, the upper bound on the achievable rate of a class of codes, called batched codes, is studied for line networks. Batched…

Information Theory · Computer Science 2022-05-06 Shenghao Yang , Jie Wang

In natural language processing (NLP), the "Transformer" architecture was proposed as the first transduction model replying entirely on self-attention mechanisms without using sequence-aligned recurrent neural networks (RNNs) or convolution,…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-07-20 Bingbing Li , Santosh Pandey , Haowen Fang , Yanjun Lyv , Ji Li , Jieyang Chen , Mimi Xie , Lipeng Wan , Hang Liu , Caiwen Ding

Reconfigurable architectures like Field Programmable Gate Arrays (FPGAs) have been used for accelerating computations in several domains because of their unique combination of flexibility, performance, and power efficiency. However, FPGAs…

Hardware Architecture · Computer Science 2023-04-26 Murat Isik , Kayode Inadagbo , Hakan Aktas

Deep Convolutional Neural Networks (CNNs) have achieved state-of-the-art performance in a wide range of applications. However, deeper CNN models, which are usually computation consuming, are widely required for complex Artificial…

Systems and Control · Electrical Eng. & Systems 2020-01-08 Chaoyang Zhu , Kejie Huang , Shuyuan Yang , Ziqi Zhu , Hejia Zhang , Haibin Shen

Memory bandwidth is known to be a performance bottleneck for FPGA accelerators, especially when they deal with large multi-dimensional data-sets. A large body of work focuses on reducing of off-chip transfers, but few authors try to improve…

Hardware Architecture · Computer Science 2024-01-23 Corentin Ferry , Nicolas Derumigny , Steven Derrien , Sanjay Rajopadhye

Machine learning is increasingly used to improve decisions within branch-and-bound algorithms for mixed-integer programming. Many existing approaches rely on deep learning, which often requires very large training datasets and substantial…

Machine Learning · Computer Science 2026-04-02 Selin Bayramoğlu , George L Nemhauser , Nikolaos V Sahinidis

Large language models (LLMs) have demonstrated remarkable performance across a wide range of language processing tasks. However, this success comes at the cost of substantial computation and memory requirements, which significantly impedes…

Machine Learning · Computer Science 2026-01-21 Fen-Yu Hsieh , Yun-Chang Teng , Ding-Yong Hong , Jan-Jan Wu

In view of the large amount of calculation and long calculation time of convolutional neural network (CNN), this paper proposes a convolutional neural network hardware accelerator based on field programmable logic gate array (FPGA). First,…

Hardware Architecture · Computer Science 2020-12-08 Xiong Jun
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