Related papers: FPGA Implementation of Low-Power Multiplierless Pr…
Energy-efficiency is a key concern for neural network applications. To alleviate this issue, hardware acceleration using FPGAs or GPUs can provide better energy-efficiency than general-purpose processors. However, further improvement of the…
Inspired by Wilkinson ADC method, we implement a fast linear discharge method based on FPGA to digitize nuclear pulse signal. In this scheme, we use a constant current source to discharge the charge on capacitor which is integrated by the…
Power-spectrum analysis is an important tool providing critical information about a signal. The range of applications includes communication-systems to DNA-sequencing. If there is interference present on a transmitted signal, it could be…
In this work, we introduce a new hardware architecture for decoding correlated errors in quantum LDPC codes. The decoder is based on message passing and exploits the structure of the detector error model obtained through the recently…
Power dissipation in integrated circuits is one of the major concerns to the research community, at the verge when more number of transistors are integrated on a single chip. The substantial source of power dissipation in sequential…
In a high-speed coherent optical transmission system, typically the signals obtained at the receiver front-end are digitized using very high-speed ADCs and then processed in the digital domain to remove optical channel impairments. In this…
The demise of Moore's Law has led to the rise of hardware acceleration. However, the focus on accelerating stable algorithms in their entirety neglects the abundant fine-grained acceleration opportunities available in broader domains and…
The operation of CMOS Field Programmable Gate Arrays (FPGAs) at extremely cold environments as low as 4 K is demonstrated. Various FPGA and periphery hardware design techniques spanning from HDL design to improvements of peripheral…
This article reports on the use of a Field Programmable Gate Array (FPGA) platform for local ultra-stable optical frequency distribution through a 90 m-long fiber network. This platform is used to implement a fully digital treatment of the…
Montgomery modular multiplication is widely-used in public key cryptosystems (PKC) and affects the efficiency of upper systems directly. However, modulus is getting larger due to the increasing demand of security, which results in a heavy…
This paper introduces the concept of on-chip temporal optical computing, based on dispersive Fourier transform and suitably designed modulation module, to perform mathematical operations of interest, such as differentiation, integration, or…
This work presents a novel reconfigurable architecture for Low Latency Graph Neural Network (LL-GNN) designs for particle detectors, delivering unprecedented low latency performance. Incorporating FPGA-based GNNs into particle detectors…
We introduce a prototype FPGA decoder implementing the recently discovered Relay-BP algorithm and targeting memory experiments on the $[[144,12,12]]$ bivariate bicycle quantum low-density parity check code. The decoder is both fast and…
This paper deals with turbo-equalization for coded data transmission over intersymbol interference (ISI) channels. We propose a message-passing algorithm that uses the expectation-propagation rule to convert messages passed from the…
Microstrip three-way (that is, 4.8 dB) integrated filtering power divider (FPD) is presented in this paper. The proposed FPD evenly distributes an input power signal into three equal output signals. The design incorporates balanced signal…
Two multiplierless algorithms are proposed for 4x4 approximate-DCT for transform coding in digital video. Computational architectures for 1-D/2-D realisations are implemented using Xilinx FPGA devices. CMOS synthesis at the 45 nm node…
Memcomputing is a novel computing paradigm beyond the von-Neumann one. Its digital version is designed for the efficient solution of combinatorial optimization problems, which emerge in various fields of science and technology. Previously,…
We demonstrate the code-division multiplexed (CDM) readout of eight transition-edge sensor microcalorimeters. The energy resolution is 3.0 eV (full width at half-maximum) or better at 5.9 keV, with a best resolution of 2.3 eV and a mean of…
An orthogonal 16-point approximate discrete cosine transform (DCT) is introduced. The proposed transform requires neither multiplications nor bit-shifting operations. A fast algorithm based on matrix factorization is introduced, requiring…
In this work, a new partition-collocation strategy for the parallel execution of CFD--DEM couplings is investigated. Having a good parallel performance is a key issue for an Eulerian-Lagrangian software that aims to be applied to solve…