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BERT is the most recent Transformer-based model that achieves state-of-the-art performance in various NLP tasks. In this paper, we investigate the hardware acceleration of BERT on FPGA for edge computing. To tackle the issue of huge…

Hardware Architecture · Computer Science 2021-03-05 Zejian Liu , Gang Li , Jian Cheng

Attention mechanisms, particularly within Transformer architectures and large language models (LLMs), have revolutionized sequence modeling in machine learning and artificial intelligence applications. To compute attention for increasingly…

Hardware Architecture · Computer Science 2025-06-02 Kosmas Alexandridis , Vasileios Titopoulos , Giorgos Dimitrakopoulos

The scale invariant feature transform (SIFT) algorithm is considered a classical feature extraction algorithm within the field of computer vision. SIFT keypoint descriptor matching is a computationally intensive process due to the amount of…

Computer Vision and Pattern Recognition · Computer Science 2020-12-18 Luka Daoud , Muhammad Kamran Latif , H S. Jacinto , Nader Rafla

We demonstrate, for the first time, fully quantized training (FQT) of large language models (LLMs) using predominantly 4-bit floating-point (FP4) precision for weights, activations, and gradients on datasets up to 200 billion tokens. We…

Machine Learning · Computer Science 2025-08-12 Brian Chmiel , Maxim Fishman , Ron Banner , Daniel Soudry

We present novel algorithmic solutions together with implementation details utilizing non-Abelian symmetries in order to boost the current limits of tensor network state algorithms on high performance computing infrastructure. In our…

Computational Physics · Physics 2023-10-02 Andor Menczer , Örs Legeza

Large Language Models (LLMs) are now integral across various domains and have demonstrated impressive performance. Progress, however, rests on the premise that benchmark scores are both accurate and reproducible. We demonstrate that the…

Computation and Language · Computer Science 2025-10-28 Jiayi Yuan , Hao Li , Xinheng Ding , Wenya Xie , Yu-Jhe Li , Wentian Zhao , Kun Wan , Jing Shi , Xia Hu , Zirui Liu

We present VitaLLM, a mixed precision accelerator that enables ternary weight large language models to run efficiently on edge devices. The design combines two compute cores, a multiplier free TINT core for ternary-INT projections and a…

Hardware Architecture · Computer Science 2026-05-04 Zi-Wei Lin , Tian-Sheuan Chang

Resistive random access memory (ReRAM) is a promising technology that can perform low-cost and in-situ matrix-vector multiplication (MVM) in analog domain. Scientific computing requires high-precision floating-point (FP) processing.…

Hardware Architecture · Computer Science 2023-10-18 Linghao Song , Fan Chen , Xuehai Qian , Hai Li , Yiran Chen

Largely due to their increased native capacity for numerical intensity and power efficiency, reduced-precision floating-point computing resources, primarily used in artificial intelligence (AI) applications, have expanded at a greater rate…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-19 Harun Bayraktar , Cole Brower , John Gunnels , Greg Henry , Cherin Joseph , Jack Kosaian , Dmitry Lyakh , Lukas Mosimann , Victor Podlozhnyuk , Addison Richards , Paul Springer , Haicheng Wu

Transformer-based Large Language Models (LLMs) have made a significant impact on various domains. However, LLMs' efficiency suffers from both heavy computation and memory overheads. Compression techniques like sparsification and…

The widely-used, weight-only quantized large language models (LLMs), which leverage low-bit integer (INT) weights and retain floating-point (FP) activations, reduce storage requirements while maintaining accuracy. However, this shifts the…

Hardware Architecture · Computer Science 2025-05-13 Chao Fang , Man Shi , Robin Geens , Arne Symons , Zhongfeng Wang , Marian Verhelst

Transformer-based large language models (LLMs) rely heavily on intensive matrix multiplications for attention and feed-forward layers, with the Q, K, and V linear projections in the Multi-Head Self-Attention (MHA) module constituting a…

Hardware Architecture · Computer Science 2025-05-22 Richie Li , Sicheng Chen

This paper introduces SpeedLLM, a neural network accelerator designed on the Xilinx Alevo U280 platform and optimized for the Tinyllama framework to enhance edge computing performance. Key innovations include data stream parallelism, a…

Hardware Architecture · Computer Science 2025-07-22 Peipei Wang , Wu Guan , Liping Liang , Zhijun Wang , Hanqing Luo , Zhibin Zhang

Modern instruction-tuned large language models (LLMs) have made remarkable progress in code generation. However, these LLMs fine-tuned with standard supervised fine-tuning (SFT) sometimes generate plausible-looking but functionally…

Software Engineering · Computer Science 2026-01-14 Lishui Fan , Zhongxin Liu , Haoye Wang , Lingfeng Bao , Xin Xia , Shanping Li

Recently DRAM-based PIMs (processing-in-memories) with unmodified cell arrays have demonstrated impressive performance for accelerating AI applications. However, due to the very restrictive hardware constraints, PIM remains an accelerator…

Hardware Architecture · Computer Science 2023-10-17 Jaewoo Park , Sugil Lee , Jongeun Lee

Large language models (LLMs) face significant inference latency due to inefficiencies in GEMM operations, weight access, and KV cache access, especially in real-time scenarios. This highlights the need for a versatile compute-memory…

Hardware Architecture · Computer Science 2025-09-15 Huizheng Wang , Zichuan Wang , Zhiheng Yue , Yousheng Long , Taiquan Wei , Jianxun Yang , Yang Wang , Chao Li , Shaojun Wei , Yang Hu , Shouyi Yin

Large language models (LLMs) are computationally intensive. The computation workload and the memory footprint grow quadratically with the dimension (layer width). Most of LLMs' parameters come from the linear layers of the transformer…

Machine Learning · Computer Science 2024-02-22 Xiao-Yang Liu , Jie Zhang , Guoxuan Wang , Weiqing Tong , Anwar Walid

Mixing precisions for performance has been an ongoing trend as the modern hardware accelerators started including new, and mostly lower-precision, data formats. The advantage of using them is a great potential of performance gain and energy…

Residual neural networks are widely used in computer vision tasks. They enable the construction of deeper and more accurate models by mitigating the vanishing gradient problem. Their main innovation is the residual block which allows the…

Hardware Architecture · Computer Science 2023-11-03 Filippo Minnella , Teodoro Urso , Mihai T. Lazarescu , Luciano Lavagno

Neural network accelerators with low latency and low energy consumption are desirable for edge computing. To create such accelerators, we propose a design flow for accelerating the extremely low bit-width neural network (ELB-NN) in embedded…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-10-29 Junsong Wang , Qiuwen Lou , Xiaofan Zhang , Chao Zhu , Yonghua Lin , Deming Chen