English
Related papers

Related papers: Optimizing Winograd Convolution on ARMv8 processor…

200 papers

FPGA-based hardware accelerators for convolutional neural networks (CNNs) have obtained great attentions due to their higher energy efficiency than GPUs. However, it is challenging for FPGA-based solutions to achieve a higher throughput…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-06-09 Yixing Li , Zichuan Liu , Kai Xu , Hao Yu , Fengbo Ren

A novel energy-efficient edge computing paradigm is proposed for real-time deep learning-based image upsampling applications. State-of-the-art deep learning solutions for image upsampling are currently trained using either resize or…

Computer Vision and Pattern Recognition · Computer Science 2021-07-27 Ian Colbert , Ken Kreutz-Delgado , Srinjoy Das

Automated design methods for convolutional neural networks (CNNs) have recently been developed in order to increase the design productivity. We propose a neuroevolution method capable of evolving and optimizing CNNs with respect to the…

Neural and Evolutionary Computing · Computer Science 2019-10-16 Filip Badan , Lukas Sekanina

Image convolution is widely used for sharpening, blurring and edge detection. In this paper, we review two common algorithms for convolving a 2D image by a separable kernel (filter). After optimising the naive codes using loop unrolling and…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-11-28 Ashkan Tousimojarad , Wim Vanderbauwhede , W Paul Cockshott

Deep convolutional neural networks take GPU days of compute time to train on large data sets. Pedestrian detection for self driving cars requires very low latency. Image recognition for mobile phones is constrained by limited processing…

Neural and Evolutionary Computing · Computer Science 2015-11-11 Andrew Lavin , Scott Gray

This work introduces lightweight extensions to the RISC-V ISA to boost the efficiency of heavily Quantized Neural Network (QNN) inference on microcontroller-class cores. By extending the ISA with nibble (4-bit) and crumb (2-bit) SIMD…

Hardware Architecture · Computer Science 2020-12-01 Angelo Garofalo , Giuseppe Tagliavini , Francesco Conti , Luca Benini , Davide Rossi

RRAM-based multi-core systems improve the energy efficiency and performance of CNNs. Thereby, the distributed parallel execution of convolutional layers causes critical data dependencies that limit the potential speedup. This paper presents…

Hardware Architecture · Computer Science 2023-10-27 Rebecca Pelke , Nils Bosbach , Jose Cubero , Felix Staudigl , Rainer Leupers , Jan Moritz Joseph

Most of today's computer vision pipelines are built around deep neural networks, where convolution operations require most of the generally high compute effort. The Winograd convolution algorithm computes convolutions with fewer MACs…

Hardware Architecture · Computer Science 2022-09-28 Renzo Andri , Beatrice Bussolino , Antonio Cipolletta , Lukas Cavigelli , Zhe Wang

Convolutional Neural Networks (CNNs) are rapidly gaining popularity in varied fields. Due to their increasingly deep and computationally heavy structures, it is difficult to deploy them on energy constrained mobile applications. Hardware…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-01-10 Akanksha Baranwal , Ishan Bansal , Roopal Nahar , K. Madhava Krishna

Popular deep neural networks (DNNs) spend the majority of their execution time computing convolutions. The Winograd family of algorithms can greatly reduce the number of arithmetic operations required and is present in many DNN software…

Numerical Analysis · Computer Science 2019-05-03 Barbara Barabasz , Andrew Anderson , Kirk M. Soodhalter , David Gregg

Convolutional neural networks (CNNs) require high throughput hardware accelerators for real time applications owing to their huge computational cost. Most traditional CNN accelerators rely on single core, linear processing elements (PEs) in…

Hardware Architecture · Computer Science 2020-07-21 Mahmood Azhar Qureshi , Arslan Munir

Convolutional neural networks (CNNs) have found many applications in tasks involving two-dimensional (2D) data, such as image classification and image processing. Therefore, 2D convolution layers have been heavily optimized on CPUs and…

FPGA accelerators for lightweight neural convolutional networks (LWCNNs) have recently attracted significant attention. Most existing LWCNN accelerators focus on single-Computing-Engine (CE) architecture with local optimization. However,…

Hardware Architecture · Computer Science 2024-12-17 Zhiyuan Zhao , Yihao Chen , Pengcheng Feng , Jixing Li , Gang Chen , Rongxuan Shen , Huaxiang Lu

Tensor processing units (TPUs), specialized hardware accelerators for machine learning tasks, have shown significant performance improvements when executing convolutional layers in convolutional neural networks (CNNs). However, they…

Hardware Architecture · Computer Science 2023-04-20 Mohammed E. Elbtity , Brendan Reidy , Md Hasibul Amin , Ramtin Zand

Deep convolutional neural networks (CNN) are widely used in modern artificial intelligence (AI) and smart vision systems but also limited by computation latency, throughput, and energy efficiency on a resource-limited scenario, such as…

Hardware Architecture · Computer Science 2017-09-18 Yuan Du , Li Du , Yilei Li , Junjie Su , Mau-Chung Frank Chang

Modern deep learning applications urge to push the model inference taking place at the edge devices for multiple reasons such as achieving shorter latency, relieving the burden of the network connecting to the cloud, and protecting user…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-07-05 Leyuan Wang , Zhi Chen , Yizhi Liu , Yao Wang , Lianmin Zheng , Mu Li , Yida Wang

Quantization for Convolutional Neural Network (CNN) has shown significant progress with the intention of reducing the cost of computation and storage with low-bitwidth data inputs. There are, however, no systematic studies on how an…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-12-30 Xinheng Liu , Yao Chen , Prakhar Ganesh , Junhao Pan , Jinjun Xiong , Deming Chen

Hardware accelerators for convolution neural networks (CNNs) enable real-time applications of artificial intelligence technology. However, most of the existing designs suffer from low hardware utilization or high area cost due to complex…

Hardware Architecture · Computer Science 2022-05-06 Kuo-Wei Chang , Tian-Sheuan Chang

In recent years deep learning algorithms have shown extremely high performance on machine learning tasks such as image classification and speech recognition. In support of such applications, various FPGA accelerator architectures have been…

Machine Learning · Computer Science 2017-05-09 Xinyu Zhang , Srinjoy Das , Ojash Neopane , Ken Kreutz-Delgado

Processing-in-memory (PIM) architectures are emerging to reduce data movement in data-intensive applications. These architectures seek to exploit the same physical devices for both information storage and logic, thereby dwarfing the…

Hardware Architecture · Computer Science 2023-05-09 Orian Leitersdorf , Ronny Ronen , Shahar Kvatinsky