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The second-order training methods can converge much faster than first-order optimizers in DNN training. This is because the second-order training utilizes the inversion of the second-order information (SOI) matrix to find a more accurate…

Hardware Architecture · Computer Science 2022-10-28 Yilong Zhao , Li Jiang , Mingyu Gao , Naifeng Jing , Chengyang Gu , Qidong Tang , Fangxin Liu , Tao Yang , Xiaoyao Liang

Memory system is often the main bottleneck in chipmultiprocessor (CMP) systems in terms of latency, bandwidth and efficiency, and recently additionally facing capacity and power problems in an era of big data. A lot of research works have…

Hardware Architecture · Computer Science 2014-04-10 Licheng Chen , Tianyue Lu , Yanan Wang , Mingyu Chen , Yuan Ruan , Zehan Cui , Yongbing Huang , Mingyang Chen , Jiutian Zhang , Yungang Bao

With unprecedented demand for generative AI (GenAI) inference, acceleration of primitives that dominate GenAI such as general matrix-vector multiplication (GEMV) is receiving considerable attention. A challenge with GEMVs is the high memory…

Hardware Architecture · Computer Science 2024-04-02 Mohamed Assem Ibrahim , Mahzabeen Islam , Shaizeen Aga

While graph-based dynamic programming (DP) is a cornerstone of genomics and network analytics, its efficiency is hampered by fundamentally conflicting computational patterns. Matrix-centric DP drives regular, compute-bound network…

Hardware Architecture · Computer Science 2026-04-20 Yanru Chen , Runyang Tian , Zheyu Li , Mahbod Afarin , Weihong Xu , Tajana Rosing

As data-intensive applications increasingly strain conventional computing systems, processing-in-memory (PIM) has emerged as a promising paradigm to alleviate the memory wall by minimizing data transfer between memory and processing units.…

Emerging Technologies · Computer Science 2026-02-05 Thomas Neuner , Henriette Padberg , Lior Kornblum , Eilam Yalon , Pedram Khalili Amiri , Shahar Kvatinsky

Many modern workloads, such as neural networks, databases, and graph processing, are fundamentally memory-bound. For such workloads, the data movement between main memory and CPU cores imposes a significant overhead in terms of both latency…

Hardware Architecture · Computer Science 2022-05-06 Juan Gómez-Luna , Izzat El Hajj , Ivan Fernandez , Christina Giannoula , Geraldo F. Oliveira , Onur Mutlu

Developing kernels for Processing-In-Memory (PIM) platforms poses unique challenges in data management and parallel programming on limited processing units. Although software development kits (SDKs) for PIM, such as the UPMEM SDK, provide…

Hardware Architecture · Computer Science 2025-10-21 Krystian Chmielewski , Jarosław Ławnicki , Uladzislau Lukyanau , Tadeusz Kobus , Maciej Maciejewski

Spiking Neural Networks (SNNs) have gained popularity due to their high energy efficiency. Prior works have proposed various methods for training SNNs, including backpropagation-based methods. Training SNNs is computationally expensive…

Signal Processing · Electrical Eng. & Systems 2024-11-18 Sai Sanjeet , Bibhu Datta Sahoo , Keshab K. Parhi

Edge computing is a popular target for accelerating machine learning algorithms supporting mobile devices without requiring the communication latencies to handle them in the cloud. Edge deployments of machine learning primarily consider…

Hardware Architecture · Computer Science 2024-10-28 Sébastien Ollivier , Sheng Li , Yue Tang , Chayanika Chaudhuri , Peipei Zhou , Xulong Tang , Jingtong Hu , Alex K. Jones

The high memory and computation demand of large language models (LLMs) makes them challenging to be deployed on consumer devices due to limited GPU memory. Offloading can mitigate the memory constraint but often suffers from low GPU…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-06-16 Yangyijian Liu , Jun Li , Wu-Jun Li

Compute-in-memory (CIM) has shown significant potential in efficiently accelerating deep neural networks (DNNs) at the edge, particularly in speeding up quantized models for inference applications. Recently, there has been growing interest…

Hardware Architecture · Computer Science 2025-02-12 Zhiqiang Yi , Yiwen Liang , Weidong Cao

Large Language Models (LLMs) are increasingly deployed on edge devices with Neural Processing Units (NPUs), yet the decode phase remains memory-intensive, limiting performance. Processing-in-Memory (PIM) offers a promising solution, but…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-18 Hai Huang

With the rapid growth of deep neural networks (DNNs), compute-in-memory (CIM) has emerged as a promising energy-efficient paradigm for accelerating multiply-and-accumulate (MAC) operations. Yet, current CIM architectures are largely limited…

Hardware Architecture · Computer Science 2026-04-16 Subhradip Chakraborty , Ankur Singh , Akhilesh R. Jaiswal

Processing-using-memory (PuM) techniques leverage the analog operation of memory cells to perform computation. Several recent works have demonstrated PuM techniques in off-the-shelf DRAM devices. Since DRAM is the dominant memory technology…

Hardware Architecture · Computer Science 2023-09-06 Ataberk Olgun , Juan Gómez Luna , Konstantinos Kanellopoulos , Behzad Salami , Hasan Hassan , Oğuz Ergin , Onur Mutlu

The resurgence of near-memory processing (NMP) with the advent of big data has shifted the computation paradigm from processor-centric to memory-centric computing. To meet the bandwidth and capacity demands of memory-centric computing, 3D…

Hardware Architecture · Computer Science 2021-04-29 Pritam Majumder , Jiayi Huang , Sungkeun Kim , Abdullah Muzahid , Dylan Siegers , Chia-Che Tsai , Eun Jung Kim

The size of deep neural networks (DNNs) grows rapidly as the complexity of the machine learning algorithm increases. To satisfy the requirement of computation and memory of DNN training, distributed deep learning based on model parallelism…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-01-15 Letian Zhao , Rui Xu , Tianqi Wang , Teng Tian , Xiaotian Wang , Wei Wu , Chio-in Ieong , Xi Jin

Approximate nearest neighbor search (ANNS) is essential for applications like recommendation systems and retrieval-augmented generation (RAG) but is highly I/O-intensive and memory-demanding. CPUs face I/O bottlenecks, while GPUs are…

Performance · Computer Science 2025-08-27 Mingkai Chen , Tianhua Han , Cheng Liu , Shengwen Liang , Kuai Yu , Lei Dai , Ziming Yuan , Ying Wang , Lei Zhang , Huawei Li , Xiaowei Li

With Von-Neumann computing architectures struggling to address computationally- and memory-intensive big data analytic task today, Processing-in-Memory (PIM) platforms are gaining growing interests. In this way, processing-in-DRAM…

Hardware Architecture · Computer Science 2019-04-12 Shaahin Angizi , Deliang Fan

This paper proposes a memory-efficient optimization strategy for the high-performance point cloud registration algorithm VANICP, enabling lightweight execution on embedded GPUs with constrained hardware resources. VANICP is a recently…

Computer Vision and Pattern Recognition · Computer Science 2025-12-05 Qiong Chang , Weimin Wang , Junpei Zhong , Jun Miyazaki

Crossbar-based PIM DNN accelerators can provide massively parallel in-situ operations. A specifically designed compiler is important to achieve high performance for a wide variety of DNN workloads. However, some key compilation issues such…

Hardware Architecture · Computer Science 2023-07-06 Xiaotian Sun , Xinyu Wang , Wanqian Li , Lei Wang , Yinhe Han , Xiaoming Chen
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