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We propose a co-design approach for compute-in-memory inference for deep neural networks (DNN). We use multiplication-free function approximators based on ell_1 norm along with a co-adapted processing array and compute flow. Using the…

Hardware Architecture · Computer Science 2021-02-02 Shamma Nasrin , Diaa Badawi , Ahmet Enis Cetin , Wilfred Gomes , Amit Ranjan Trivedi

Deploying mixed-precision neural networks on edge devices is friendly to hardware resources and power consumption. To support fully mixed-precision neural network inference, it is necessary to design flexible hardware accelerators for…

Hardware Architecture · Computer Science 2025-02-04 Liang Zhao , Kunming Shao , Fengshi Tian , Tim Kwang-Ting Cheng , Chi-Ying Tsui , Yi Zou

The cost involved in training deep neural networks (DNNs) on von-Neumann architectures has motivated the development of novel solutions for efficient DNN training accelerators. We propose a hybrid in-memory computing (HIC) architecture for…

Hardware Architecture · Computer Science 2021-02-11 Vinay Joshi , Wangxin He , Jae-sun Seo , Bipin Rajendran

Event-based sensors are drawing increasing attention due to their high temporal resolution, low power consumption, and low bandwidth. To efficiently extract semantically meaningful information from sparse data streams produced by such…

Hardware Architecture · Computer Science 2022-05-02 Alfio Di Mauro , Arpan Suravi Prasad , Zhikai Huang , Matteo Spallanzani , Francesco Conti , Luca Benini

Neural-network (NN) inference is increasingly present on-board spacecraft to reduce downlink bandwidth and enable timely decision making. However, the power and reliability constraints of space missions limit the applicability of many…

Hardware Architecture · Computer Science 2026-03-17 Pedro Antunes , Artur Podobas

Due to the high activation sparsity and use of accumulates (AC) instead of expensive multiply-and-accumulates (MAC), neuromorphic spiking neural networks (SNNs) have emerged as a promising low-power alternative to traditional DNNs for…

Computer Vision and Pattern Recognition · Computer Science 2022-12-22 Gourav Datta , Zeyu Liu , Md Abdullah-Al Kaiser , Souvik Kundu , Joe Mathai , Zihan Yin , Ajey P. Jacob , Akhilesh R. Jaiswal , Peter A. Beerel

Spiking Neural Network (SNN) inference has a clear potential for high energy efficiency as computation is triggered by events. However, the inherent sparsity of events poses challenges for conventional computing systems, driving the…

Hardware Architecture · Computer Science 2025-04-09 Simone Manoni , Paul Scheffler , Luca Zanatta , Andrea Acquaviva , Luca Benini , Andrea Bartolini

Spiking Neural Networks (SNNs) offer a biologically inspired computational paradigm, enabling energy-efficient data processing through spike-based information transmission. Despite notable advancements in hardware for SNNs, spike encoding…

Signal Processing · Electrical Eng. & Systems 2025-06-03 MHD Anas Alsakkal , Runze Wang , Piotr Dudek , Jayawan Wijekoon

Various processing-in-memory (PIM) accelerators based on various devices, micro-architectures, and interfaces have been proposed to accelerate deep neural networks (DNNs). How to deploy DNNs onto PIM-based accelerators is the key to explore…

Hardware Architecture · Computer Science 2024-11-15 Xiaotian Sun , Xinyu Wang , Wanqian Li , Yinhe Han , Xiaoming Chen

In today's data-centric world, where data fuels numerous application domains, with machine learning at the forefront, handling the enormous volume of data efficiently in terms of time and energy presents a formidable challenge. Conventional…

Hardware Architecture · Computer Science 2024-01-29 Asif Ali Khan , João Paulo C. De Lima , Hamid Farzaneh , Jeronimo Castrillon

The human brain is a complex spiking neural network (SNN), capable of learning multimodal signals in a zero-shot manner by generalizing existing knowledge. Remarkably, it maintains minimal power consumption through event-based signal…

Computing-in-memory (CiM) is a promising technique to achieve high energy efficiency in data-intensive matrix-vector multiplication (MVM) by relieving the memory bottleneck. Unfortunately, due to the limited SRAM capacity, existing…

Hardware Architecture · Computer Science 2022-08-18 Yiming Chen , Guodong Yin , Zhanhong Tan , Mingyen Lee , Zekun Yang , Yongpan Liu , Huazhong Yang , Kaisheng Ma , Xueqing Li

Non-volatile memory (NVM) crossbars have been identified as a promising technology, for accelerating important machine learning operations, with matrix-vector multiplication being a key example. Binary neural networks (BNNs) are especially…

Emerging Technologies · Computer Science 2023-08-14 Ruirong Huang , Zichao Yue , Caroline Huang , Janarbek Matai , Zhiru Zhang

Spiking Neural Networks (SNNs) offer a biologically inspired alternative to conventional artificial neural networks, with potential advantages in power efficiency due to their event-driven computation. Despite their promise, SNNs have yet…

Neural and Evolutionary Computing · Computer Science 2024-11-27 Wangdan Liao , Weidong Wang

Intelligent mobile agents (e.g., UGVs and UAVs) typically demand low power/energy consumption when solving their machine learning (ML)-based tasks, since they are usually powered by portable batteries with limited capacity. A potential…

Neural and Evolutionary Computing · Computer Science 2025-04-21 Rachmad Vidya Wicaksana Putra , Muhammad Shafique

Spiking neural networks (SNNs), which are inspired by the human brain, have recently gained popularity due to their relatively simple and low-power hardware for transmitting binary spikes and highly sparse activation maps. However, because…

Hardware Architecture · Computer Science 2022-05-03 Hong-Han Lien , Tian-Sheuan Chang

Transformers have become the backbone of neural network architecture for most machine learning applications. Their widespread use has resulted in multiple efforts on accelerating attention, the basic building block of transformers. This…

Hardware Architecture · Computer Science 2025-02-19 Dong Eun Kim , Tanvi Sharma , Kaushik Roy

State-of-the-Art (SotA) hardware implementations of Deep Neural Networks (DNNs) incur high latencies and costs. Binary Neural Networks (BNNs) are potential alternative solutions to realize faster implementations without losing accuracy. In…

Hardware Architecture · Computer Science 2024-02-01 Taha Shahroodi , Raphael Cardoso , Stephan Wong , Alberto Bosio , Ian O'Connor , Said Hamdioui

Edge computing is a popular target for accelerating machine learning algorithms supporting mobile devices without requiring the communication latencies to handle them in the cloud. Edge deployments of machine learning primarily consider…

Hardware Architecture · Computer Science 2024-10-28 Sébastien Ollivier , Sheng Li , Yue Tang , Chayanika Chaudhuri , Peipei Zhou , Xulong Tang , Jingtong Hu , Alex K. Jones

Computing-in-Memory (CIM) architectures have emerged as a promising solution for accelerating Deep Neural Networks (DNNs) by mitigating data movement bottlenecks. However, realizing the potential of CIM requires specialized dataflow…

Hardware Architecture · Computer Science 2025-10-31 Xiaolin He , Cenlin Duan , Yingjie Qi , Xiao Ma , Jianlei Yang