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Large language models (LLMs) have demonstrated remarkable abilities in natural language processing. However, their deployment on resource-constrained embedded devices remains difficult due to memory and computational demands. In this paper,…

Hardware Architecture · Computer Science 2024-09-19 Han Xu , Yutong Li , Shihao Ji

Coherent Ising Machines (CIMs) have emerged as a hybrid form of quantum computing devices designed to solve NP-complete problems, offering an exciting opportunity for discovering optimal solutions. Despite challenges such as susceptibility…

This paper introduces SpeedLLM, a neural network accelerator designed on the Xilinx Alevo U280 platform and optimized for the Tinyllama framework to enhance edge computing performance. Key innovations include data stream parallelism, a…

Hardware Architecture · Computer Science 2025-07-22 Peipei Wang , Wu Guan , Liping Liang , Zhijun Wang , Hanqing Luo , Zhibin Zhang

Deployment of modern TinyML tasks on small battery-constrained IoT devices requires high computational energy efficiency. Analog In-Memory Computing (IMC) using non-volatile memory (NVM) promises major efficiency improvements in deep neural…

Hardware Architecture · Computer Science 2022-01-05 Angelo Garofalo , Gianmarco Ottavi , Francesco Conti , Geethan Karunaratne , Irem Boybat , Luca Benini , Davide Rossi

Training machine learning algorithms is a computationally intensive process, which is frequently memory-bound due to repeatedly accessing large training datasets. As a result, processor-centric systems (e.g., CPU, GPU) suffer from costly…

Hardware Architecture · Computer Science 2022-08-04 Juan Gómez-Luna , Yuxin Guo , Sylvan Brocard , Julien Legriel , Remy Cimadomo , Geraldo F. Oliveira , Gagandeep Singh , Onur Mutlu

DNNs are widely used but face significant computational costs due to matrix multiplications, especially from data movement between the memory and processing units. One promising approach is therefore Processing-in-Memory as it greatly…

Hardware Architecture · Computer Science 2024-01-19 Lorenzo Sonnino , Shaswot Shresthamali , Yuan He , Masaaki Kondo

Analog in-memory computing (AIMC) is a promising compute paradigm to improve speed and power efficiency of neural network inference beyond the limits of conventional von Neumann-based architectures. However, AIMC introduces fundamental…

The integration of spiking neural networks (SNNs) with transformer-based architectures has opened new opportunities for bio-inspired low-power, event-driven visual reasoning on edge devices. However, the high temporal resolution and binary…

Hardware Architecture · Computer Science 2025-11-11 Tamoghno Das , Khanh Phan Vu , Hanning Chen , Hyunwoo Oh , Mohsen Imani

Active Learning Method (ALM) is one of the powerful tools in soft computing that is inspired by human brain capabilities in processing complicated information. ALM, which is in essence an adaptive fuzzy learning method, models a Multi-Input…

Emerging Technologies · Computer Science 2016-02-24 Sajad Haghzad Klidbary , Saeed Bagheri Shouraki , Iman Esmaili Pain Afrakoti

Modern computing systems are limited in performance by the memory bandwidth available to processors, a problem known as the memory wall. Processing-in-Memory (PIM) promises to substantially improve this problem by moving processing closer…

Cryptography and Security · Computer Science 2025-04-24 Sahar Ghoflsaz Ghinani , Jingyao Zhang , Elaheh Sadredini

Structured sparsity enables deploying large language models (LLMs) on resource-constrained systems. Approaches like dense-to-sparse fine-tuning are particularly compelling, achieving remarkable structured sparsity by reducing the model size…

Hardware Architecture · Computer Science 2025-10-14 João Paulo Cardoso de Lima , Marc Dietrich , Jeronimo Castrillon , Asif Ali Khan

The von Neumann architecture, in which the memory and the computation units are separated, demands massive data traffic between the memory and the CPU. To reduce data movement, new technologies and computer architectures have been explored.…

Emerging Technologies · Computer Science 2022-09-01 Adi Eliahu , Rotem Ben-Hur , Ronny Ronen , Shahar Kvatinsky

Bulk-bitwise processing-in-memory (PIM), where large bitwise operations are performed in parallel by the memory array itself, is an emerging form of computation with the potential to mitigate the memory wall problem. This paper examines the…

Hardware Architecture · Computer Science 2023-09-29 Ben Perach , Ronny Ronen , Benny Kimelfeld , Shahar Kvatinsky

Large Language Models (LLMs) demonstrate substantial potential across a diverse array of domains via request serving. However, as trends continue to push for expanding context sizes, the autoregressive nature of LLMs results in highly…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-07-08 Bin Lin , Chen Zhang , Tao Peng , Hanyu Zhao , Wencong Xiao , Minmin Sun , Anmin Liu , Zhipeng Zhang , Lanbo Li , Xiafei Qiu , Shen Li , Zhigang Ji , Tao Xie , Yong Li , Wei Lin

The rapid advancement of Large Language Models (LLMs) necessitates a deep understanding of their fundamental performance limits. This paper investigates the limits of LLM inference, focusing on hardware-imposed bottlenecks in…

Hardware Architecture · Computer Science 2025-11-17 Michael Davies , Neal Crago , Karthikeyan Sankaralingam , Christos Kozyrakis

Processing-in-memory (PIM) has emerged as the go to solution for addressing the von Neumann bottleneck in edge AI accelerators. However, state-of-the-art (SoTA) digital PIM approaches suffer from low compute density, primarily due to the…

Hardware Architecture · Computer Science 2025-10-23 Mukul Lokhande , Narendra Singh Dhakad , Seema Chouhan , Akash Sankhe , Santosh Kumar Vishvakarma

Digital processing-in-memory (PIM) architectures are rapidly emerging to overcome the memory-wall bottleneck by integrating logic within memory elements. Such architectures provide vast computational power within the memory itself in the…

Hardware Architecture · Computer Science 2023-04-18 Orian Leitersdorf , Dean Leitersdorf , Jonathan Gal , Mor Dahan , Ronny Ronen , Shahar Kvatinsky

The explosive arrival of OpenAI's ChatGPT has fueled the globalization of large language model (LLM), which consists of billions of pretrained parameters that embodies the aspects of syntax and semantics. HyperAccel introduces latency…

Large Language Models (LLMs) have propelled groundbreaking advancements across several domains and are commonly used for text generation applications. However, the computational demands of these complex models pose significant challenges,…

Processing-in-memory (PIM) has emerged as an enabler for the energy-efficient and high-performance acceleration of deep learning (DL) workloads. Resistive random-access memory (ReRAM) is one of the most promising technologies to implement…

Hardware Architecture · Computer Science 2024-03-29 Harsh Sharma , Gaurav Narang , Janardhan Rao Doppa , Umit Ogras , Partha Pratim Pande