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New hardware, such as SmartNICs, has been released to offload network applications in data centers. Off-path SmartNICs, a type of multi-core SoC SmartNICs, have attracted the attention of many researchers. Unfortunatelly, they lack the…

Networking and Internet Architecture · Computer Science 2023-01-18 Shangyi Sun , Chunpu Huang , Rui Zhang , Lulu Chen , Yukai Huang , Ming Yan , Jie Wu

SmartNIC Data Processing Units (DPUs) offer a promising solution for saving high-end CPU resources by offloading tasks to programmable cores near the network interface. In this work, we explore the feasibility of SmartNIC DPUs in supporting…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-25 Jacob Wahlgren , Andong Hu , Roger Pearce , Maya Gokhale , Ivy Peng

Cloud deployments disaggregate storage from compute, providing more flexibility to both the storage and compute layers. In this paper, we explore disaggregation by taking it one step further and applying it to memory (DRAM). Disaggregated…

The rapid evolution of Large Language Models (LLMs) towards long-context reasoning and sparse architectures has pushed memory requirements far beyond the capacity of individual device HBM. While emerging supernode architectures offer…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-02-04 Fangxin Liu , Qinghua Zhang , Hanjing Shen , Zhibo Liang , Li Jiang , Haibing Guan , Chong Bao , Xuefeng Jin

SmartNICs have been increasingly utilized across various applications to offload specific computational tasks, thereby enhancing overall system performance. However, this offloading process introduces several communication challenges that…

Networking and Internet Architecture · Computer Science 2025-07-08 Mohammed Zain Farooqi , Masoud Hemmatpour , Tore Heide Larsen

Memory-compute disaggregation promises transparent elasticity, high utilization and balanced usage for resources in data centers by physically separating memory and compute into network-attached resource "blades". However, existing designs…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-10-22 Seung-seob Lee , Yanpeng Yu , Yupeng Tang , Anurag Khandelwal , Lin Zhong , Abhishek Bhattacharjee

Memory disaggregation has attracted great attention recently because of its benefits in efficient memory utilization and ease of management. So far, memory disaggregation research has all taken one of two approaches: building/emulating…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-01-24 Zhiyuan Guo , Yizhou Shan , Xuhao Luo , Yutong Huang , Yiying Zhang

Host CPU resources are heavily consumed by TCP stack processing, limiting scalability in data centers. Existing offload methods typically address only partial functionality or lack flexibility. This paper introduces PnO (Plug & Offload), an…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-04-01 Hailong Nan , Zhe Zhou , Min Yang

The computation and memory-intensive nature of DNNs limits their use in many mobile and embedded contexts. Application-specific integrated circuit (ASIC) hardware accelerators employ matrix multiplication units (such as the systolic arrays)…

Hardware Architecture · Computer Science 2024-02-02 Ruiqi Sun , Yinchen Ni , Xin He , Jie Zhao , An Zou

Disaggregation and rack-scale systems have the potential of drastically decreasing TCO and increasing utilization of cloud datacenters, while maintaining performance. While the concept of organising resources in separate pools and…

Hardware Architecture · Computer Science 2018-01-12 Dimitris Syrivelis , Andrea Reale , Kostas Katrinis , Christian Pinto

Today's data centers consist of thousands of network-connected hosts, each with CPUs and accelerators such as GPUs and FPGAs. These hosts also contain network interface cards (NICs), operating at speeds of 100Gb/s or higher, that are used…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-12-12 Guanwen Zhong , Aditya Kolekar , Burin Amornpaisannon , Inho Choi , Haris Javaid , Mario Baldi

Memory disaggregation (MD) allows for scalable and elastic data center design by separating compute (CPU) from memory. With MD, compute and memory are no longer coupled into the same server box. Instead, they are connected to each other via…

Databases · Computer Science 2022-07-08 Ruihong Wang , Jianguo Wang , Stratos Idreos , M. Tamer Özsu , Walid G. Aref

Traditional data centers are designed with a rigid architecture of fit-for-purpose servers that provision resources beyond the average workload in order to deal with occasional peaks of data. Heterogeneous data centers are pushing towards…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-09-20 Carlos Vega , Jose Fernando Zazo , Hugo Meyer , Ferad Zyulkyarov , Sergio Lopez Buedo , Javier Aracil

Recent studies have demonstrated that near-data processing (NDP) is an effective technique for improving performance and energy efficiency of data-intensive workloads. However, leveraging NDP in realistic systems with multiple memory…

Hardware Architecture · Computer Science 2018-12-05 Hyojong Kim , Ramyad Hadidi , Lifeng Nai , Hyesoon Kim , Nuwan Jayasena , Yasuko Eckert , Onur Kayiran , Gabriel H. Loh

Memory disaggregation addresses memory imbalance in a cluster by decoupling CPU and memory allocations of applications while also increasing the effective memory capacity for (memory-intensive) applications beyond the local memory limit…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-02-07 Anil Yelam

SmartNICs have recently emerged as an appealing device for accelerating distributed systems. However, there has not been a comprehensive characterization of SmartNICs, and existing designs typically only leverage a single communication path…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-06-01 Xingda Wei , Rongxin Cheng , Yuhan Yang , Rong Chen , Haibo Chen

Network speeds grow quickly in the modern cloud, so SmartNICs are introduced to offload network processing tasks, even application logic. However, typical multicore SmartNICs such as BlueFiled-2 are only capable of processing control-plane…

Networking and Internet Architecture · Computer Science 2024-09-10 Xuzheng Chen , Jie Zhang , Ting Fu , Yifan Shen , Shu Ma , Kun Qian , Lingjun Zhu , Chao Shi , Yin Zhang , Ming Liu , Zeke Wang

Several studies have identified a significant amount of redundancy in the network traffic. For example, it is demonstrated that there is a great amount of redundancy within the content of a server over time. This redundancy can be leveraged…

Information Theory · Computer Science 2016-11-18 Mohsen Sardari , Ahmad Beirami , Faramarz Fekri

The exponential growth of data traffic and the increasing complexity of networked applications demand effective solutions capable of passively inspecting and analysing the network traffic for monitoring and security purposes. Implementing…

Networking and Internet Architecture · Computer Science 2024-07-24 Luca Deri , Alfredo Cardigliano , Francesco Fusco

Responding to the "datacenter tax" and "killer microseconds" problems for datacenter applications, diverse solutions including Smart NIC-based ones have been proposed. Nonetheless, they often suffer from high overhead of communications over…

Hardware Architecture · Computer Science 2022-10-19 Yifan Yuan , Jinghan Huang , Yan Sun , Tianchen Wang , Jacob Nelson , Dan R. K. Ports , Yipeng Wang , Ren Wang , Charlie Tai , Nam Sung Kim
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