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Virtual Diagnostic (VD) is a computational tool based on deep learning that can be used to predict a diagnostic output. VDs are especially useful in systems where measuring the output is invasive, limited, costly or runs the risk of…

Accelerator Physics · Physics 2021-08-04 Owen Convery , Lewis Smith , Yarin Gal , Adi Hanuka

Verifiers are auxiliary models that assess the correctness of outputs generated by base large language models (LLMs). They play a crucial role in many strategies for solving reasoning-intensive problems with LLMs. Typically, verifiers are…

Artificial Intelligence · Computer Science 2025-04-24 Bartosz Piotrowski , Witold Drzewakowski , Konrad Staniszewski , Piotr Miłoś

LLM benchmarks are increasingly dynamic: instead of containing a fixed set of questions, they define templates and parameters that can generate an effectively unlimited number of question variants. This flexibility is valuable, but it makes…

Computation and Language · Computer Science 2026-04-21 Taylor Lundy , Narun K. Raman , Kevin Leyton-Brown

Proof-carrying-code was proposed as a solution to ensure a trust relationship between two parties: a (heavyweight) analyzer and a (lightweight) checker. The analyzer verifies the conformance of a given application to a specified property…

Programming Languages · Computer Science 2018-08-06 Mohamed Nassim Seghir

Software model checking has experienced significant progress in the last two decades, however, one of its major bottlenecks for practical applications remains its scalability and adaptability. Here, we describe an approach to integrate…

Software Engineering · Computer Science 2019-07-19 Felipe R. Monteiro , Mikhail R. Gadelha , Lucas C. Cordeiro

Code verifiers play a critical role in post-verification for LLM-based code generation, yet existing supervised fine-tuning methods suffer from data scarcity, high failure rates, and poor inference efficiency. While reinforcement learning…

Artificial Intelligence · Computer Science 2026-02-02 Ji Shi , Peiming Guo , Meishan Zhang , Miao Zhang , Xuebo Liu , Min Zhang , Weili Guan

Runtime Verification is a lightweight formal verification technique. It is used to verify at runtime whether the system under analysis behaves as expected. The expected behaviour is usually formally specified by means of properties, which…

Logic in Computer Science · Computer Science 2021-10-26 Angelo Ferrando , Rafael C. Cardoso

Traditionally, practitioners use formal methods pre-dominately for one half of the quality-assurance process: verification (do we build the software right?). The other half -- validation (do we build the right software?) -- has been given…

Software Engineering · Computer Science 2021-02-12 Atif Mashkoor , Michael Leuschel , Alexander Egyed

Current network control plane verification tools cannot scale to large networks, because of the complexity of jointly reasoning about the behaviors of all nodes in the network. In this paper we present a modular approach to control plane…

Networking and Internet Architecture · Computer Science 2023-09-22 Alan Tang , Ryan Beckett , Steven Benaloh , Karthick Jayaraman , Tejas Patil , Todd Millstein , George Varghese

In various provers and deductive verification tools, logical transformations are used extensively in order to reduce a proof task into a number of simpler tasks. Logical transformations are often part of the trusted base of such tools. In…

Logic in Computer Science · Computer Science 2021-07-07 Quentin Garchery

The paper overviews recent developments in platform-dependent explicit-state LTL model checking.

Software Engineering · Computer Science 2011-11-03 Luboš Brim , Jiří Barnat

With today's quantum processors venturing into regimes beyond the capabilities of classical devices [1-3], we face the challenge to verify that these devices perform as intended, even when we cannot check their results on classical…

Automatic verification deals with the validation by means of computers of correctness certificates. The related tools, usually called proof assistants or interactive provers, provide an interactive environment for the creation of formal…

Logic in Computer Science · Computer Science 2017-01-16 Andrea Asperti

This paper presents verification-guided development (VGD), a software engineering process we used to build Cedar, a new policy language for expressive, fast, safe, and analyzable authorization. Developing a system with VGD involves writing…

This paper introduces ProofCloud, a proof retrieval engine for verified proofs in higher order logic. It provides a fast proof searching service for mathematicians and computer scientists for the reuse of proofs and proof packages. In…

Logic in Computer Science · Computer Science 2024-12-31 Shuai Wang

We describe a novel approach for adapting an existing software model checker to perform precise runtime verification. The software under test is allowed to communicate with the wider environment (including the file system and network). The…

Software Engineering · Computer Science 2018-06-01 Katarína Kejstová , Petr Ročkai , Jiří Barnat

Program analysis is on the brink of mainstream in embedded systems development. Formal verification of behavioural requirements, finding runtime errors and automated test case generation are some of the most common applications of automated…

Software Engineering · Computer Science 2014-09-23 Peter Schrammel , Daniel Kroening , Martin Brain , Ruben Martins , Tino Teige , Tom Bienmüller

Writing correct programs for weak memory models such as the C11 memory model is challenging because of the weak consistency guarantees these models provide. The first program logics for the verification of such programs have recently been…

Programming Languages · Computer Science 2018-02-20 Alexander J. Summers , Peter Müller

Software Model Checkers have shown outstanding performance improvements in recent times. Moreover, for specific use cases, formal verification techniques have shown to be highly effective, leading to a number of high-profile success…

Software Engineering · Computer Science 2017-06-14 Rodrigo Castaño , Victor Braberman , Diego Garbervetsky , Sebastian Uchitel

A Verifiable Delay Function (VDF) is a function that takes a specified sequential time to be evaluated, but can be efficiently verified. VDFs are useful in several applications ranging from randomness beacons to sustainable blockchains but…

Cryptography and Security · Computer Science 2023-12-27 Souvik Sur