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Remote run-time attestation methods, including Control Flow Attestation (CFA) and Data Flow Attestation (DFA), have been proposed to generate precise evidence of execution's control flow path (in CFA) and optionally execution data inputs…

Cryptography and Security · Computer Science 2025-07-08 Adam Caulfield , Norrathep Rattanavipanon , Ivan De Oliveira Nunes

This article presents an electron tunneling noise programmable random variate accelerator for accelerating the sampling stage of Monte Carlo simulations. We used the LiteX framework to generate a FemtoRV imfc RISC-V instruction set soft…

Hardware Architecture · Computer Science 2024-04-09 James T. Meech , Vasileios Tsoutsouras , Phillip Stanley-Marbell

By exploiting the modular RISC-V ISA this paper presents the customization of instruction set with posit\textsuperscript{\texttrademark} arithmetic instructions to provide improved numerical accuracy, well-defined behavior and increased…

Hardware Architecture · Computer Science 2024-04-09 Federico Rossi , Francesco Urbani , Marco Cococcioni , Emanuele Ruffaldi , Sergio Saponara

While model-based verifiers are essential for scaling Reinforcement Learning with Verifiable Rewards (RLVR), current outcome-centric verification paradigms primarily focus on the consistency between the final result and the ground truth,…

Computation and Language · Computer Science 2026-02-13 Xiangfeng Wang , Hangyu Guo , Yanlin Lai , Mitt Huang , Liang Zhao , Chengyuan Yao , Yinmin Zhang , Qi Han , Xiaoxiao Ren , Chun Yuan , Tong Xu , Zheng Ge , Xiangyu Zhang , Daxin Jiang

In this paper, we propose a high-performance RISC-V soft processor with an efficient fetch unit supporting the compressed instructions targeting on FPGA. The compressed instruction extension in RISC-V can reduce the program size by about…

Hardware Architecture · Computer Science 2020-11-24 Takuto Kanamori , Hiromu Miyazaki , Kenji Kise

The wider adoption of tightly coupled core-adjacent accelerators, such as Arm Scalable Matrix Extension (SME), hinges on lowering software programming complexity. In this paper, we focus on enabling the use of SME architecture in Streaming…

Programming Languages · Computer Science 2025-06-04 Mohamed Husain Noor Mohamed , Adarsh Patil , Latchesar Ionkov , Eric Van Hensbergen

Runtime verification (RV) is a pragmatic and scalable, yet rigorous technique, to assess the correctness of complex systems, including cyber-physical systems (CPS). By measuring how robustly a CPS run satisfies a specification, RV allows in…

Logic in Computer Science · Computer Science 2018-02-13 Stefan Jaksic , Ezio Bartocci , Radu Grosu , Dejan Nickovic

Classical simulation of molecular systems is limited by exponential scaling, a hurdle quantum algorithms like Variational Quantum Eigensolvers (VQEs) aim to overcome. Although ADAPT-VQE enhances VQEs by dynamically building ans\"atze, it…

Quantum Physics · Physics 2025-06-23 Tatiana A. Bespalova , Oumaya Ladhari , Guido Masella

The proliferation of low-precision units in modern high-performance architectures increasingly burdens domain scientists. Historically, the choice in HPC was easy: can we get away with 32 bit floating-point operations and lower bandwidth…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-09-23 Faveo Hoerold , Ivan R. Ivanov , Akash Dhruv , William S. Moses , Anshu Dubey , Mohamed Wahib , Jens Domke

Quantum machine learning is at the crossroads of two of the most exciting current areas of research; quantum computing and classical machine learning. It explores the interaction between quantum computing and machine learning, investigating…

Quantum Physics · Physics 2021-12-14 Anekait Kariya , Bikash K. Behera

While most instruction set architectures (ISAs) are only available to use through the purchase of a restrictive commercial license, the RISC-V ISA presents a free and open-source alternative. Due to this availability, many free and…

Hardware Architecture · Computer Science 2025-09-26 Ian McDougall , Harish Batchu , Michael Davies , Karthikeyan Sankaralingam

Stencil computation is essential in high-performance computing, especially for large-scale tasks like liquid simulation and weather forecasting. Optimizing its performance can reduce both energy consumption and computation time, which is…

Performance · Computer Science 2025-03-04 Hongguang Chen

This paper presents a novel, non-standard set of vector instruction types for exploring custom SIMD instructions in a softcore. The new types allow simultaneous access to a relatively high number of operands, reducing the instruction count…

Hardware Architecture · Computer Science 2021-06-15 Philippos Papaphilippou , Paul H. J. Kelly , Wayne Luk

Virtualization has rapidly become a go-to technology for increasing efficiency in the data center. With virtualization technologies providing tremendous flexibility, even disparate architectures may be deployed on a single machine without…

Distributed, Parallel, and Cluster Computing · Computer Science 2010-10-18 Joshua White , Adam Pilbeam

A state vector-based quantum circuit simulation can provide accurate results for the development and validation of quantum computing algorithms, without being affected by noise interference. However, existing quantum circuit simulators have…

Quantum Physics · Physics 2024-09-27 Chuan-Chi Wang

Prototyping HPC systems with low-to-mid technology readiness level (TRL) systems is critical for providing feedback to hardware designers, the system software team (e.g., compiler developers), and early adopters from the scientific…

Spatial dataflow architectures such as reconfigurable dataflow accelerators (RDA) can provide much higher performance and efficiency than CPUs and GPUs. In particular, vectorized reconfigurable dataflow accelerators (vRDA) in recent…

Hardware Architecture · Computer Science 2024-02-01 Alexander Rucker , Shiv Sundram , Coleman Smith , Matthew Vilim , Raghu Prabhakar , Fredrik Kjolstad , Kunle Olukotun

Neural networks are increasingly used in real-time systems, such as automated driving applications. This requires high-performance hardware with predictable timing behavior. State-of-the-art real-time hardware is limited in memory and…

Hardware Architecture · Computer Science 2024-10-15 Maximilian Kirschner , Konstantin Dudzik , Jürgen Becker

Simulation is an indispensable tool in the development and testing of autonomous vehicles (AVs), offering an efficient and safe alternative to road testing. An outstanding challenge with simulation-based testing is the generation of…

Robotics · Computer Science 2024-12-13 Peide Huang , Wenhao Ding , Benjamin Stoler , Jonathan Francis , Bingqing Chen , Ding Zhao

Quantum computational chemistry (QCC) is the use of quantum computers to solve problems in computational quantum chemistry. We develop a high performance variational quantum eigensolver (VQE) simulator for simulating quantum computational…