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This paper presents a hardware architecture of fast simplified successive cancellation (fast-SSC) algorithm for polar codes, which significantly reduces the decoding latency and dramatically increases the throughput. Algorithmically,…

Information Theory · Computer Science 2015-09-30 Tiben Che , Jingwei Xu , Gwan Choi

Low-precision formats have proven to be an efficient way to reduce not only the memory footprint but also the hardware resources and power consumption of deep learning computations. Under this premise, the posit numerical format appears to…

Machine Learning · Computer Science 2021-05-17 Gonçalo Raposo , Pedro Tomás , Nuno Roma

FPGA-based accelerators are becoming more popular for deep neural network due to the ability to scale performance with increasing degree of specialization with dataflow architectures or custom data types. To reduce the barrier for software…

Hardware Architecture · Computer Science 2022-04-12 Syed Asad Alam , David Gregg , Giulio Gambardella , Thomas Preusser , Michaela Blott

Edge-AI applications still face considerable challenges in enhancing computational efficiency in resource-constrained environments. This work presents RAMAN, a resource-efficient and approximate posit(8,2)-based Multiply-Accumulate (MAC)…

Hardware Architecture · Computer Science 2025-10-28 Mohd Faisal Khan , Mukul Lokhande , Santosh Kumar Vishvakarma

The growing demand for edge-AI systems requires arithmetic units that balance numerical precision, energy efficiency, and compact hardware while supporting diverse formats. Posit arithmetic offers advantages over floating- and fixed-point…

Hardware Architecture · Computer Science 2026-01-27 Sonu Kumar , Lavanya Vinnakota , Mukul Lokhande , Santosh Kumar Vishvakarma , Adam Teman

Hardware accelerators, especially those designed for tensor processing, have become ubiquitous in today's computing landscape. However, even with significant efforts in building compilers, programming these tensor accelerators remains…

Programming Languages · Computer Science 2025-11-07 Charles Hong , Sahil Bhatia , Alvin Cheung , Yakun Sophia Shao

Tantalum (Ta) has recently received considerable attention in manufacturing robust superconducting quantum circuits. Ta offers low microwave loss, high kinetic inductance compared to aluminium (Al) and niobium (Nb), and good compatibility…

Mainstream image and video coding standards -- including state-of-the-art codecs like H.266/VVC, AVS3, and AV1 -- adopt a block-based hybrid coding framework. While this framework facilitates straightforward optimization for Peak…

Image and Video Processing · Electrical Eng. & Systems 2025-10-17 Runyu Yang , Ivan V. Bajić

Modern edge AI workloads demand maximum energy efficiency, motivating the pursuit of analog Compute-in-Memory (CIM) architectures. Simultaneously, the popularity of Large-Language-Models (LLMs) drives the adoption of low-bit floating-point…

Hardware Architecture · Computer Science 2026-02-10 Brian Rojkov , Shubham Ranjan , Derek Wright , Manoj Sachdev

Visual encoding constitutes a major computational bottleneck in Multimodal Large Language Models (MLLMs), especially for high-resolution image inputs. The prevailing practice typically adopts global encoding followed by post-ViT…

Computer Vision and Pattern Recognition · Computer Science 2026-05-12 Kechen Fang , Yihua Qin , Chongyi Wang , Wenshuo Ma , Tianyu Yu , Yuan Yao

Photonics is the platform of choice to build a modular, easy-to-network quantum computer operating at room temperature. However, no concrete architecture has been presented so far that exploits both the advantages of qubits encoded into…

Fixed-point number representation is commonly employed in digital VLSI designs that have stringent hardware efficiency constraints. However, fixed-point numbers cover a relatively small dynamic range for a given bitwidth. In contrast,…

Hardware Architecture · Computer Science 2025-12-02 Seyed Hadi Mirfarshbafan , Nicolas Filliol , Oscar Castañeda , Christoph Studer

This paper presents a novel approach for performing computations using Look-Up Tables (LUTs) tailored specifically for Compute-in-Memory applications. The aim is to address the scalability challenges associated with LUT-based computation by…

Hardware Architecture · Computer Science 2023-11-20 Peyman Dehghanzadeh , Baibhab Chatterjee , Swarup Bhunia

Lagrange coded computation (LCC) is essential to solving problems about matrix polynomials in a coded distributed fashion; nevertheless, it can only solve the problems that are representable as matrix polynomials. In this paper, we propose…

Information Theory · Computer Science 2022-05-23 Navneet Agrawal , Yuqin Qiu , Matthias Frey , Igor Bjelakovic , Setareh Maghsudi , Slawomir Stanczak , Jingge Zhu

We present a solid state implementation of quantum computation, which improves previously proposed optically driven schemes. Our proposal is based on vertical arrays of quantum dots embedded in a mesoporous material which can be fabricated…

Mesoscale and Nanoscale Physics · Physics 2009-11-13 T. Hodgson , M. Bertino , N. Leventis , I. D'Amico

Advanced driver-assistance systems (ADAS) require neural compute engines that deliver low-latency inference under strict power and area constraints. Posit arithmetic is attractive for such accelerators because it provides high numerical…

Hardware Architecture · Computer Science 2026-05-11 Mukul Lokhande , Ratko Pilipovic , Omkar Kokane , Adam Teman , Santosh Kumar Vishvakarma

While recent advances in AI SoC design have focused heavily on accelerating tensor computation, the equally critical task of tensor manipulation, centered on high,volume data movement with minimal computation, remains underexplored. This…

Hardware Architecture · Computer Science 2025-06-18 Weiyu Zhou , Zheng Wang , Chao Chen , Yike Li , Yongkui Yang , Zhuoyu Wu , Anupam Chattopadhyay

Large language models (LLMs) are increasingly deployed on customer devices. To support them, current devices are adopting SoCs (System on Chip) with NPUs (Neural Processing Unit) installed. Although high performance is expected, LLM…

Hardware Architecture · Computer Science 2025-11-17 Jianyu Wei , Qingtao Li , Shijie Cao , Lingxiao Ma , Zixu Hao , Yanyong Zhang , Xiaoyan Hu , Ting Cao

High-rate and large-distance quantum codes are expected to make fault-tolerant quantum computing more efficient, but most of them lack efficient fault-tolerant encoded-state preparation methods. We propose such a fault-tolerant encoder for…

Quantum Physics · Physics 2025-09-22 Naoyuki Kanomata , Hayato Goto

Polar codes have gained significant attention in channel coding for their ability to approach the capacity of binary input discrete memoryless channels (B-DMCs), thanks to their reliability and efficiency in transmission. However, existing…

Information Theory · Computer Science 2025-01-30 Jiaxing Li , Shuwen Zhang , Zhisong Bie