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High-Level Synthesis (HLS) serves as an agile hardware development tool that streamlines the circuit design by abstracting the register transfer level into behavioral descriptions, while allowing designers to customize the generated…

Hardware Architecture · Computer Science 2025-06-03 Runkai Li , Jia Xiong , Xi Wang

High-Level Synthesis (HLS) is a pivotal electronic design automation (EDA) technology that enables the generation of hardware circuits from high-level language descriptions. A critical step in HLS is Design Space Exploration (DSE), which…

Hardware Architecture · Computer Science 2026-03-03 Lei Xu , Shanshan Wang , Chenglong Xiao

The design of efficient hardware accelerators for high-throughput data-processing applications, e.g., deep neural networks, is a challenging task in computer architecture design. In this regard, High-Level Synthesis (HLS) emerges as a…

Hardware Architecture · Computer Science 2021-11-30 Lorenzo Ferretti , Andrea Cini , Georgios Zacharopoulos , Cesare Alippi , Laura Pozzi

Embedded systems continue to rapidly proliferate in diverse fields, including medical devices, autonomous vehicles, and more generally, the Internet of Things (IoT). Many embedded systems require application-specific hardware components to…

Hardware Architecture · Computer Science 2024-04-24 Yuchao Liao , Tosiron Adegbija , Roman Lysecky

High-Level Synthesis (HLS) Design Space Exploration (DSE) is essential for generating hardware designs that balance performance, power, and area (PPA). To optimize this process, existing works often employs message-passing neural networks…

Machine Learning · Computer Science 2025-10-16 Lei Xu , Shanshan Wang , Emmanuel Casseau , Chenglong Xiao

High-level synthesis (HLS) has significantly advanced the automation of digital circuits design, yet the need for expertise and time in pragma tuning remains challenging. Existing solutions for the design space exploration (DSE) adopt…

Hardware Architecture · Computer Science 2025-04-14 Ping Chang , Tosiron Adegbija , Yuchao Liao , Claudio Talarico , Ao Li , Janet Roveda

Hardware accelerators are key to the efficiency and performance of system-on-chip (SoC) architectures. With high-level synthesis (HLS), designers can easily obtain several performance-cost trade-off implementations for each component of a…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-12-24 Luca Piccolboni , Paolo Mantovani , Giuseppe Di Guglielmo , Luca P. Carloni

High-Level Synthesis (HLS) frameworks allow to easily specify a large number of variants of the same hardware design by only acting on optimization directives. Nonetheless, the hardware synthesis of implementations for all possible…

Hardware Architecture · Computer Science 2021-01-05 Lorenzo Ferretti , Jihye Kwon , Giovanni Ansaloni , Giuseppe Di Guglielmo , Luca Carloni , Laura Pozzi

High-Level Synthesis (HLS) Design Space Exploration (DSE) is a widely accepted approach for efficiently exploring Pareto-optimal and optimal hardware solutions during the HLS process. Several HLS benchmarks and datasets are available for…

Machine Learning · Computer Science 2024-04-24 Yuchao Liao , Tosiron Adegbija , Roman Lysecky , Ravi Tandon

High-level synthesis (HLS) is a design flow that leverages modern language features and flexibility, such as complex data structures, inheritance, templates, etc., to prototype hardware designs rapidly. However, exploring various design…

Hardware Architecture · Computer Science 2024-03-19 Md Rubel Ahmed , Toshiaki Koike-Akino , Kieran Parsons , Ye Wang

There have been several recent works proposed to utilize model-based optimization methods to improve the productivity of using high-level synthesis (HLS) to design domain-specific architectures. They would replace the time-consuming…

Hardware Architecture · Computer Science 2024-08-27 Zijian Ding , Atefeh Sohrabizadeh , Weikai Li , Zongyue Qin , Yizhou Sun , Jason Cong

High-level synthesis (HLS) is an automated design process that transforms high-level code into hardware designs, enabling the rapid development of hardware accelerators. HLS relies on pragmas, which are directives inserted into the source…

Machine Learning · Computer Science 2025-05-09 Yunsheng Bai , Atefeh Sohrabizadeh , Zijian Ding , Rongjian Liang , Weikai Li , Ding Wang , Haoxing Ren , Yizhou Sun , Jason Cong

High-level synthesis (HLS) has been widely adopted as it significantly improves the hardware design productivity and enables efficient design space exploration (DSE). Existing HLS tools are built using compiler infrastructures largely based…

Programming Languages · Computer Science 2021-12-23 Hanchen Ye , Cong Hao , Jianyi Cheng , Hyunmin Jeong , Jack Huang , Stephen Neuendorffer , Deming Chen

High-Level Synthesis (HLS) design space exploration (DSE) seeks Pareto-optimal designs within expansive pragma configuration spaces. To accelerate HLS DSE, graph neural networks (GNNs) are commonly employed as surrogates for HLS tools to…

Hardware Architecture · Computer Science 2026-01-09 Lei Xu , Shanshan Wang , Chenglong Xiao

Even though high-level synthesis (HLS) tools mitigate the challenges of programming domain-specific accelerators (DSAs) by raising the abstraction level, optimizing hardware directive parameters remains a significant hurdle. Existing…

Hardware Architecture · Computer Science 2025-11-24 Hanyu Wang , Xinrui Wu , Zijian Ding , Su Zheng , Chengyue Wang , Neha Prakriya , Tony Nowatzki , Yizhou Sun , Jason Cong

High-level synthesis (HLS) enhances digital hardware design productivity through a high abstraction level. Even if the HLS abstraction prevents fine-grained manual register-transfer level (RTL) optimizations, it also enables automatable…

Hardware Architecture · Computer Science 2024-01-01 Giovanni Brignone , Mihai T. Lazarescu , Luciano Lavagno

High-level synthesis (HLS) enables designers to customize hardware designs efficiently. However, it is still challenging to foresee the correlation between power consumption and HLS-based applications at an early design stage. To overcome…

Hardware Architecture · Computer Science 2020-09-03 Zhe Lin , Jieru Zhao , Sharad Sinha , Wei Zhang

In today's rapidly evolving field of electronic design automation (EDA), the complexity of hardware designs is increasing, necessitating more sophisticated automation solutions. High-level synthesis (HLS), as a pivotal solution, automates…

Programming Languages · Computer Science 2025-08-06 M Zafir Sadik Khan , Nowfel Mashnoor , Mohammad Akyash , Kimia Azar , Hadi Kamali

High-level synthesis (HLS) performs well for simple memory access patterns, such as for sequential accesses that can be turned into bursts, or for memory accesses into small datasets that can be stored in scratchpads. This limits HLS to…

Hardware Architecture · Computer Science 2026-05-25 David Metz , Magnus Själander

To cope with the complex embedded system design, early design space exploration (DSE) is used to make design decisions early in the design phase. For early DSE it is crucial that the running time of the exploration is as small as possible.…

Performance · Computer Science 2013-08-30 P. van Stralen
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