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As AI workloads drive increasing memory requirements, domain-specific accelerators need higher-density on-chip memory beyond what current SRAM scaling trends can provide. Simultaneously, the vast amounts of short-lived data in these…

Transformers are mostly relying on softmax attention, which introduces quadratic complexity with respect to sequence length and remains a major bottleneck for efficient inference. Prior work on linear or hybrid attention typically replaces…

Resistive random-access memory (ReRAM) crossbar arrays are suitable for efficient inference computations in neural networks due to their analog general matrix-matrix multiplication (GEMM) capabilities. However, traditional ReRAM-based…

Hardware Architecture · Computer Science 2024-09-26 Hery Shin , Jae-Young Kim , Donghyuk Kim , Joo-Young Kim

Transformer structures have been widely used in sequential recommender systems (SRS). However, as user interaction histories increase, computational time and memory requirements also grow. This is mainly caused by the standard attention…

Information Retrieval · Computer Science 2026-05-25 Mengyang Ma , Xiaopeng Li , Wanyu Wang , Zhaocheng Du , Jingtong Gao , Pengyue Jia , Yuyang Ye , Yiqi Wang , Yunpeng Weng , Weihong Luo , Xiao Han , Xiangyu Zhao

We present TransNormerLLM, the first linear attention-based Large Language Model (LLM) that outperforms conventional softmax attention-based models in terms of both accuracy and efficiency. TransNormerLLM evolves from the previous linear…

Computation and Language · Computer Science 2024-01-22 Zhen Qin , Dong Li , Weigao Sun , Weixuan Sun , Xuyang Shen , Xiaodong Han , Yunshen Wei , Baohong Lv , Xiao Luo , Yu Qiao , Yiran Zhong

Deploying Large Language Models (LLMs) efficiently on edge devices is often constrained by limited memory capacity and high power consumption. Low-bit quantization methods, particularly ternary quantization, have demonstrated significant…

Hardware Architecture · Computer Science 2025-05-02 Chenyang Yin , Zhenyu Bai , Pranav Venkatram , Shivam Aggarwal , Zhaoying Li , Tulika Mitra

The rapid surge in data generated by Internet of Things (IoT), artificial intelligence (AI), and machine learning (ML) applications demands ultra-fast, scalable, and energy-efficient hardware, as traditional von Neumann architectures face…

Compute-in-memory (CIM) techniques are widely employed in energy-efficient artificial intelligent (AI) processors. They alleviate power and latency bottlenecks caused by extensive data movements between compute and storage units. To extend…

Hardware Architecture · Computer Science 2025-12-15 Jianyi Yu , Tengxiao Wang , Yuxuan Wang , Xiang Fu , Fei Qiao , Ying Wang , Rui Yuan , Liyuan Liu , Cong Shi

The highly popular Transformer architecture, based on self-attention, is the foundation of large pretrained models such as BERT, that have become an enduring paradigm in NLP. While powerful, the computational resources and time required to…

Computation and Language · Computer Science 2021-08-31 Ran Tian , Joshua Maynez , Ankur P. Parikh

Various forms of sparse attention have been explored to mitigate the quadratic computational and memory cost of the attention mechanism in transformers. We study sparse transformers not through a lens of efficiency but rather in terms of…

Machine Learning · Computer Science 2025-06-19 Parikshit Ram , Kenneth L. Clarkson , Tim Klinger , Shashanka Ubaru , Alexander G. Gray

Training stable biological foundation models requires rethinking attention mechanisms: we find that using sigmoid attention as a drop in replacement for softmax attention a) produces better learned representations: on six diverse…

Machine Learning · Computer Science 2026-05-01 Vijay Sadashivaiah , Georgios Dasoulas , Judith Mueller , Soumya Ghosh

Processing Using Memory (PUM) accelerators have the potential to perform Deep Neural Network (DNN) inference by using arrays of memory cells as computation engines. Among various memory technologies, ReRAM crossbars show promising…

Hardware Architecture · Computer Science 2024-10-24 Mohammad Sabri , Marc Riera , Antonio González

The optimization of the transpose convolution layer for deep learning applications is achieved with the kernel segregation mechanism. However, kernel segregation has disadvantages, such as computing extra elements to obtain the output…

Machine Learning · Computer Science 2025-03-03 Vijay Srinivas Tida , Md Imran Hossen , Liqun Shan , Sai Venkatesh Chilukoti , Sonya Hsu , Xiali Hei

Deep neural networks are increasingly bottlenecked by the cost of optimization, both in terms of GPU memory and compute time. Existing acceleration techniques, such as mixed precision, second-order methods, and batch size scaling, are…

Machine Learning · Computer Science 2025-09-03 Mohsen Sheibanian , Pouya Shaeri , Alimohammad Beigi , Ryan T. Woo , Aryan Keluskar

This paper presents a novel architecture utilizing a 10T SRAM cell for XNOR-based in-memory computing, aimed at mitigating the extensive routing challenges typically encountered in conventional in-memory computing systems. By integrating a…

Hardware Architecture · Computer Science 2026-05-18 Narendra Singh Dhakad , Santosh Kumar Vishvakarma

High-performance computing systems are moving towards 2.5D and 3D memory hierarchies, based on High Bandwidth Memory (HBM) and Hybrid Memory Cube (HMC) to mitigate the main memory bottlenecks. This trend is also creating new opportunities…

Hardware Architecture · Computer Science 2017-09-26 Erfan Azarkhish , Davide Rossi , Igor Loi , Luca Benini

The quadratic time and memory complexity inherent to self-attention mechanisms, with respect to sequence length, presents a critical computational bottleneck in the training and deployment of large-scale Transformer-based language models.…

Machine Learning · Computer Science 2024-03-19 Praneeth Kacham , Vahab Mirrokni , Peilin Zhong

Large language model (LLM) inference demands significant amount of computation and memory, especially in the key attention mechanism. While techniques, such as quantization and acceleration algorithms, like FlashAttention, have improved…

Machine Learning · Computer Science 2024-12-18 Hao Kang , Srikant Bharadwaj , James Hensman , Tushar Krishna , Victor Ruhle , Saravan Rajmohan

Sparse deep learning has reduced computation significantly, but its irregular non-zero data distribution complicates the data flow and hinders data reuse, increasing on-chip SRAM access and thus power consumption of the chip. This paper…

Hardware Architecture · Computer Science 2025-03-26 Kai-Chieh Hsu , Tian-Sheuan Chang

Our ISCA 2015 paper provides a new programmable processing-in-memory (PIM) architecture and system design that can accelerate key data-intensive applications, with a focus on graph processing workloads. Our major idea was to completely…

Hardware Architecture · Computer Science 2023-06-28 Junwhan Ahn , Sungpack Hong , Sungjoo Yoo , Onur Mutlu , Kiyoung Choi