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The demand for efficient processing of deep neural networks (DNNs) on embedded devices is a significant challenge limiting their deployment. Exploiting sparsity in the network's feature maps is one of the ways to reduce its inference…

Computer Vision and Pattern Recognition · Computer Science 2023-09-28 Matteo Grimaldi , Darshan C. Ganji , Ivan Lazarevich , Sudhakar Sah

With the great success of Deep Neural Networks (DNN), the design of efficient hardware accelerators has triggered wide interest in the research community. Existing research explores two architectural strategies: sequential layer execution…

Hardware Architecture · Computer Science 2023-11-09 Zhewen Yu , Christos-Savvas Bouganis

The rapid advancement of wireless communication technologies, including 5G, emerging 6G networks, and the large-scale deployment of the Internet of Things (IoT), has intensified the need for efficient spectrum utilization. Automatic…

Hardware Architecture · Computer Science 2026-01-07 Kuilian Yang , Li Zhang , Ahmed M. Eltawil , Khaled Nabil Salama

Processing Using Memory (PUM) accelerators have the potential to perform Deep Neural Network (DNN) inference by using arrays of memory cells as computation engines. Among various memory technologies, ReRAM crossbars show promising…

Hardware Architecture · Computer Science 2024-10-24 Mohammad Sabri , Marc Riera , Antonio González

Deep neural networks (DNN) have become significant applications in both cloud-server and edge devices. Meanwhile, the growing number of DNNs on those platforms raises the need to execute multiple DNNs on the same device. This paper proposes…

Hardware Architecture · Computer Science 2023-02-22 Midia Reshadi , David Gregg

This paper introduces the sparse periodic systolic (SPS) dataflow, which advances the state-of-the-art hardware accelerator for supporting lightweight neural networks. Specifically, the SPS dataflow enables a novel hardware design approach…

Computer Vision and Pattern Recognition · Computer Science 2022-07-04 Jung Hwan Heo , Arash Fayyazi , Amirhossein Esmaili , Massoud Pedram

The number of processing elements (PEs) in a fixed-sized systolic accelerator is well matched for large and compute-bound DNNs; whereas, memory-bound DNNs suffer from PE underutilization and fail to achieve peak performance and energy…

Signal Processing · Electrical Eng. & Systems 2020-06-29 Nandan Kumar Jha , Shreyas Ravishankar , Sparsh Mittal , Arvind Kaushik , Dipan Mandal , Mahesh Chandra

Convolutional Neural Networks (CNNs) have emerged as a fundamental technology for machine learning. High performance and extreme energy efficiency are critical for deployments of CNNs in a wide range of situations, especially mobile…

Recent advances in Neural Architecture Search (NAS) such as one-shot NAS offer the ability to extract specialized hardware-aware sub-network configurations from a task-specific super-network. While considerable effort has been employed…

Machine Learning · Computer Science 2022-05-24 Daniel Cummings , Anthony Sarah , Sharath Nittur Sridhar , Maciej Szankin , Juan Pablo Munoz , Sairam Sundaresan

Processing visual data on mobile devices has many applications, e.g., emergency response and tracking. State-of-the-art computer vision techniques rely on large Deep Neural Networks (DNNs) that are usually too power-hungry to be deployed on…

Computer Vision and Pattern Recognition · Computer Science 2023-09-06 Ishmeet Kaur , Adwaita Janardhan Jadhav

Deep Neural Networks (DNNs) have shown significant advantages in a wide variety of domains. However, DNNs are becoming computationally intensive and energy hungry at an exponential pace, while at the same time, there is a vast demand for…

High-level synthesis (HLS) is a design flow that leverages modern language features and flexibility, such as complex data structures, inheritance, templates, etc., to prototype hardware designs rapidly. However, exploring various design…

Hardware Architecture · Computer Science 2024-03-19 Md Rubel Ahmed , Toshiaki Koike-Akino , Kieran Parsons , Ye Wang

Latency and energy consumption are key metrics in the performance of deep neural network (DNN) accelerators. A significant factor contributing to latency and energy is data transfers. One method to reduce transfers or data is reusing data…

Hardware Architecture · Computer Science 2024-10-15 Michael Gilbert , Yannan Nellie Wu , Joel S. Emer , Vivienne Sze

Sparsity is an intrinsic property of convolutional neural network(CNN) and worth exploiting for CNN accelerators, but extra processing comes with hardware overhead, causing many architectures suffering from only minor profit. Meanwhile,…

Hardware Architecture · Computer Science 2022-09-26 Wenhao Sun , Deng Liu , Zhiwei Zou , Wendi Sun , Yi Kang , Song Chen

Neural networks (NNs) with intensive multiplications (e.g., convolutions and transformers) are capable yet power hungry, impeding their more extensive deployment into resource-constrained devices. As such, multiplication-free networks,…

Machine Learning · Computer Science 2025-03-04 Haoran You , Baopu Li , Huihong Shi , Yonggan Fu , Yingyan Celine Lin

The spread of deep learning on embedded devices has prompted the development of numerous methods to optimise the deployment of deep neural networks (DNN). Works have mainly focused on: i) efficient DNN architectures, ii) network…

Machine Learning · Computer Science 2020-12-29 Miguel de Prado , Andrew Mundy , Rabia Saeed , Maurizio Denna , Nuria Pazos , Luca Benini

The significant computational cost of multiplications hinders the deployment of deep neural networks (DNNs) on edge devices. While multiplication-free models offer enhanced hardware efficiency, they typically sacrifice accuracy. As a…

Machine Learning · Computer Science 2024-09-10 Yang Xu , Huihong Shi , Zhongfeng Wang

Deep Neural Networks (DNNs) have been established as the state-of-the-art algorithm for advanced machine learning applications. Recently proposed by the Google Brain's team, the Capsule Networks (CapsNets) have improved the generalization…

Machine Learning · Computer Science 2021-01-26 Alberto Marchisio , Vojtech Mrazek , Muhammad Abdullah Hanif , Muhammad Shafique

With the increasing demand to efficiently deploy DNNs on mobile edge devices, it becomes much more important to reduce unnecessary computation and increase the execution speed. Prior methods towards this goal, including model compression…

Deploying deep neural networks (DNNs) on power-sensitive edge devices presents a formidable challenge. While Dynamic Voltage and Frequency Scaling (DVFS) is widely employed for energy optimization, traditional model-level scaling is often…

Machine Learning · Computer Science 2026-03-24 Ziyang Zhang , Zheshun Wu , Jie Liu , Luca Mottola