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Lattice Boltzmann method (LBM) is a promising approach to solving Computational Fluid Dynamics (CFD) problems, however, its nature of memory-boundness limits nearly all LBM algorithms' performance on modern computer architectures. This…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-08-11 Yuankun Fu , Fengguang Song

Multiplexed Rank DIMMs (MRDIMMs) have recently emerged as memory devices that enable higher bandwidth without increasing DRAM chip frequencies. This paper presents a detailed performance, power and energy evaluation of a production server…

Phase-change memory (PCM) devices have multiple banks to serve memory requests in parallel. Unfortunately, if two requests go to the same bank, they have to be served one after another, leading to lower system performance. We observe that a…

Hardware Architecture · Computer Science 2019-08-22 Shihao Song , Anup Das , Onur Mutlu , Nagarajan Kandasamy

The growing demand for efficient, high-performance processing in machine learning (ML) and image processing has made hardware accelerators, such as GPUs and Data Streaming Accelerators (DSAs), increasingly essential. These accelerators…

Hardware Architecture · Computer Science 2025-04-17 Qunyou Liu , Marina Zapater , David Atienza

Large Language Models (LLMs) such as LLaMA and DeepSeek, are built on transformer architectures, which have become a standard model for achieving state-of-the-art performance in natural language processing tasks. Recently, there has been…

Hardware Architecture · Computer Science 2026-04-21 Bas Ahn , Xingjian Tao , Manil Dev Gomony , Marc Geilen , Henk Corporaal

Modern analytics and recommendation systems are increasingly based on graph data that capture the relations between entities being analyzed. Practical graphs come in huge sizes, offer massive parallelism, and are stored in sparse-matrix…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-01-18 Seung Won Min , Vikram Sharma Mailthody , Zaid Qureshi , Jinjun Xiong , Eiman Ebrahimi , Wen-mei Hwu

Massive off-chip accesses in GPUs are the main performance bottleneck, and we divided these accesses into three types: (1) Write, (2) Data-Read, and (3) Read-Only. Besides, We find that many writes are duplicate, and the duplication can be…

Hardware Architecture · Computer Science 2024-08-20 Wei Zhao , Dan Feng , Wei Tong , Xueliang Wei , Bing Wu

Large language models (LLMs) hold tremendous potential for addressing numerous real-world challenges, yet they typically demand significant computational resources and memory. Deploying LLMs onto a resource-limited hardware device with…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-07-02 Pujiang He , Shan Zhou , Changqing Li , Wenhuan Huang , Weifei Yu , Duyi Wang , Chen Meng , Sheng Gui

Large language models (LLMs) have become increasingly popular in various areas, traditional business gradually shifting from rule-based systems to LLM-based solutions. However, the inference of LLMs is resource-intensive or…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-01-06 Wanyi Zheng , Minxian Xu , Shengye Song , Kejiang Ye

As the models and the datasets to train deep learning (DL) models scale, system architects are faced with new challenges, one of which is the memory capacity bottleneck, where the limited physical memory inside the accelerator device…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-02-19 Youngeun Kwon , Minsoo Rhu

Public cloud providers seek to meet stringent performance requirements and low hardware cost. A key driver of performance and cost is main memory. Memory pooling promises to improve DRAM utilization and thereby reduce costs. However,…

PCIe-connected FPGAs are gaining popularity as an accelerator technology in data centers. However, it is challenging to jointly develop and debug host software and FPGA hardware. Changes to the hardware design require a time-consuming FPGA…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-01-28 Shenghsun Cho , Mrunal Patel , Basavaraj Kaladagi , Han Chen , Tapti Palit , Michael Ferdman , Peter Milder

Large-language models (LLMs) are rapidly being applied to radiology, enabling automated image interpretation and report generation tasks. Their deployment in clinical practice requires both high diagnostic accuracy and low inference…

Tissues and Organs · Quantitative Biology 2025-11-11 Jyun-Ping Kao

Computing-In-Memory (CIM) offers a potential solution to the memory wall issue and can achieve high energy efficiency by minimizing data movement, making it a promising architecture for edge AI devices. Lightweight models like MobileNet and…

Hardware Architecture · Computer Science 2025-08-21 Choongseok Song , Doo Seok Jeong

Non-volatile memory (NVM) is a class of promising scalable memory technologies that can potentially offer higher capacity than DRAM at the same cost point. Unfortunately, the access latency and energy of NVM is often higher than those of…

Hardware Architecture · Computer Science 2018-05-01 HanBin Yoon , Justin Meza , Rachata Ausavarungnirun , Rachael A. Harding , Onur Mutlu

The quest for energy-efficient, scalable neuromorphic computing has elevated compute-in-memory (CIM) architectures to the forefront of hardware innovation. While memristive memories have been extensively explored for synaptic implementation…

Materials Science · Physics 2025-08-20 Kapil Bhardwaj , Ella Paasio , Sayani Majumdar

Enterprise SSDs integrate numerous computing resources (e.g., ARM processor and onboard DRAM) to satisfy the ever-increasing performance requirements of I/O bursts. While these resources substantially elevate the monetary costs of SSDs, the…

Operating Systems · Computer Science 2025-09-15 Shushu Yi , Yuda An , Li Peng , Xiurui Pan , Qiao Li , Jieming Yin , Guangyan Zhang , Wenfei Wu , Diyu Zhou , Zhenlin Wang , Xiaolin Wang , Yingwei Luo , Ke Zhou , Jie Zhang

Memory system is often the main bottleneck in chipmultiprocessor (CMP) systems in terms of latency, bandwidth and efficiency, and recently additionally facing capacity and power problems in an era of big data. A lot of research works have…

Hardware Architecture · Computer Science 2014-04-10 Licheng Chen , Tianyue Lu , Yanan Wang , Mingyu Chen , Yuan Ruan , Zehan Cui , Yongbing Huang , Mingyang Chen , Jiutian Zhang , Yungang Bao

We present a thorough analysis of the use of modern heterogeneous systems interconnected by various cachecoherent links, including CXL, NVLink-C2C, and Infinity Fabric. We studied a wide range of server systems that combined CPUs from…

NAND flash memory is ubiquitous in everyday life today because its capacity has continuously increased and cost has continuously decreased over decades. This positive growth is a result of two key trends: (1) effective process technology…

Hardware Architecture · Computer Science 2018-01-08 Yu Cai , Saugata Ghose , Erich F. Haratsch , Yixin Luo , Onur Mutlu