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The development of an open and free RISC-V architecture is of great interest for a wide range of areas, including high-performance computing and numerical simulation in mathematics, physics, chemistry and other problem domains. In this…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-05-21 V. D. Volokitin , E. P. Vasiliev , E. A. Kozinov , V. D. Kustikova , A. V. Liniov , Y. A. Rodimkov , A. V. Sysoyev , I. B. Meyerov

CatBoost is a popular machine learning library. CatBoost models are based on oblivious decision trees, making training and evaluation rapid. CatBoost has many applications, and some require low latency and high throughput evaluation. This…

Machine Learning · Computer Science 2022-11-02 Alexey Mironov , Ilnur Khuziev

The rapid development of RISC-V instruction set architecture presents new opportunities and challenges for software developers. Is it sufficient to simply recompile high-performance software optimized for x86-64 onto RISC-V CPUs? Are…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-06-17 Anna Pirova , Anastasia Vodeneeva , Konstantin Kovalev , Alexander Ustinov , Evgeny Kozinov , Alexey Liniov , Valentin Volokitin , Iosif Meyerov

RISC-V provides a flexible and scalable platform for applications ranging from embedded devices to high-performance computing clusters. Particularly, its RISC-V Vector Extension (RVV) becomes of interest for the acceleration of AI…

Machine Learning · Computer Science 2025-08-20 Federico Nicolas Peccia , Frederik Haxel , Oliver Bringmann

In this paper we present CatBoost, a new open-sourced gradient boosting library that successfully handles categorical features and outperforms existing publicly available implementations of gradient boosting in terms of quality on a set of…

Machine Learning · Computer Science 2018-10-29 Anna Veronika Dorogush , Vasily Ershov , Andrey Gulin

In recent years, interest in RISC-V computing architectures has moved from academic to mainstream, especially in the field of High Performance Computing where energy limitations are increasingly a concern. As of this year, the first single…

The RISC-V "V" extension introduces vector processing to the RISC-V architecture. Unlike most SIMD extensions, it supports long vectors which can result in significant improvement of multiple applications. In this paper, we present our…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-11-10 Sonia Rani Gupta , Nikela Papadopoulou , Miquel Pericàs

Gradient boosting methods based on Structured Categorical Decision Trees (SCDT) have been demonstrated to outperform numerical and one-hot-encodings on problems where the categorical variable has a known underlying structure. However, the…

Machine Learning · Statistics 2020-07-10 Brian Lucena

The emergence of a new, open, and free instruction set architecture, RISC-V, has heralded a new era in microprocessor architectures. Starting with low-power, low-performance prototypes, the RISC-V community has a good chance of moving…

Performance · Computer Science 2023-09-06 Valentin Volokitin , Evgeny Kozinov , Valentina Kustikova , Alexey Liniov , Iosif Meyerov

Decision forest (decision tree ensemble) is one of the most popular machine learning algorithms. To use large models on big data, like document scoring with learning-to-rank models, we need to evaluate these models efficiently. In this…

Machine Learning · Computer Science 2022-05-17 Alexey Mironov , Ilnur Khuziev

Gradient boosting decision trees (GBDTs) have seen widespread adoption in academia, industry and competitive data science due to their state-of-the-art performance in many machine learning tasks. One relative downside to these models is the…

Machine Learning · Computer Science 2019-01-18 Andreea Anghel , Nikolaos Papandreou , Thomas Parnell , Alessandro De Palma , Haralampos Pozidis

This paper presents a comprehensive analysis of the RISC-V instruction set architecture, focusing on its modular design, implementation challenges, and performance characteristics. We examine the RV32I base instruction set with extensions…

Hardware Architecture · Computer Science 2025-06-10 Priyanshu Yadav

Considering the high-performance and low-power requirements of edge AI, this study designs a specialized instruction set processor for edge AI based on the RISC-V instruction set architecture, addressing practical issues in digital signal…

Hardware Architecture · Computer Science 2024-09-04 Xu-Hao Chen , Si-Peng Hu , Hong-Chao Liu , Bo-Ran Liu , Dan Tang , Di Zhao

Handling vast amounts of data is crucial in today's world. The growth of high-performance computing has created a need for parallelization, particularly in the area of machine learning algorithms such as ANN (Approximate Nearest Neighbors).…

Machine Learning · Computer Science 2024-07-19 Konstantin Rumyantsev , Pavel Yakovlev , Andrey Gorshkov , Andrey P. Sokolov

Gradient Boosted Decision Tree (GBDT) is a widely-used machine learning algorithm that has been shown to achieve state-of-the-art results on many standard data science problems. We are interested in its application to multioutput problems…

Machine Learning · Computer Science 2022-11-24 Leonid Iosipoi , Anton Vakhrushev

Deep learning implementations on CPUs (Central Processing Units) are gaining more traction. Enhanced AI capabilities on commodity x86 architectures are commercially appealing due to the reuse of existing hardware and virtualization ease. A…

Machine Learning · Computer Science 2021-03-22 Shabnam Daghaghi , Nicholas Meisburger , Mengnan Zhao , Yong Wu , Sameh Gobriel , Charlie Tai , Anshumali Shrivastava

Gradient Boosted Decision Trees (GBDT) is a very successful ensemble learning algorithm widely used across a variety of applications. Recently, several variants of GBDT training algorithms and implementations have been designed and heavily…

Machine Learning · Computer Science 2019-06-27 Yu Shi , Jian Li , Zhize Li

Real-time systems, particularly those used in domains like automated driving, are increasingly adopting neural networks. From this trend arises the need for high-performance hardware exhibiting predictable timing behavior. While…

Hardware Architecture · Computer Science 2026-02-26 Maximilian Kirschner , Konstantin Dudzik , Ben Krusekamp , Jürgen Becker

Whilst the RISC-V Vector extension (RVV) has been ratified, at the time of writing both hardware implementations and open source software support are still limited for vectorisation on RISC-V. This is important because vectorisation is…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-04-21 Joseph K. L. Lee , Maurice Jamieson , Nick Brown , Ricardo Jesus

RISC-V CPUs leverage the RVV (RISC-V Vector) extension to accelerate data-parallel workloads. In addition to arithmetic operations, RVV includes powerful permutation instructions that enable flexible element rearrangement within vector…

Hardware Architecture · Computer Science 2025-06-02 Vasileios Titopoulos , George Alexakis , Chrysostomos Nicopoulos , Giorgos Dimitrakopoulos
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