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3D NAND flash memory with advanced multi-level cell techniques provides high storage density, but suffers from significant performance degradation due to a large number of read-retry operations. Although the read-retry mechanism is…

Hardware Architecture · Computer Science 2021-03-15 Jisung Park , Myungsuk Kim , Myoungjun Chun , Lois Orosa , Jihong Kim , Onur Mutlu

3D NAND flash memory with advanced multi-level cell techniques provides high storage density, but suffers from significant performance degradation due to a large number of read-retry operations. Although the read-retry mechanism is…

Hardware Architecture · Computer Science 2021-04-21 Jisung Park , Myungsuk Kim , Myoungjun Chun , Lois Orosa , Jihong Kim , Onur Mutlu

Compared to planar (i.e., two-dimensional) NAND flash memory, 3D NAND flash memory uses a new flash cell design, and vertically stacks dozens of silicon layers in a single chip. This allows 3D NAND flash memory to increase storage density…

Hardware Architecture · Computer Science 2018-11-13 Yixin Luo , Saugata Ghose , Yu Cai , Erich F. Haratsch , Onur Mutlu

NAND flash memory is ubiquitous in everyday life today because its capacity has continuously increased and cost has continuously decreased over decades. This positive growth is a result of two key trends: (1) effective process technology…

Hardware Architecture · Computer Science 2018-01-08 Yu Cai , Saugata Ghose , Erich F. Haratsch , Yixin Luo , Onur Mutlu

NAND flash memory is ubiquitous in everyday life today because its capacity has continuously increased and cost has continuously decreased over decades. This positive growth is a result of two key trends: (1) effective process technology…

Hardware Architecture · Computer Science 2017-09-25 Yu Cai , Saugata Ghose , Erich F. Haratsch , Yixin Luo , Onur Mutlu

Although NAND flash memory has achieved continuous capacity improvements via advanced 3D stacking and multi-level cell technologies, these innovations introduce new reliability challenges, particularly lateral charge spreading (LCS), absent…

Hardware Architecture · Computer Science 2025-11-11 Omin Kwon , Kyungjun Oh , Jaeyong Lee , Myungsuk Kim , Jihong Kim

Prices of NAND flash memories are falling drastically due to market growth and fabrication process mastering while research efforts from a technological point of view in terms of endurance and density are very active. NAND flash memories…

Hardware Architecture · Computer Science 2012-09-17 Jalil Boukhobza , Pierre Olivier , Stéphane Rubini

Raw bit errors are common in NAND flash memory and will increase in the future. These errors reduce flash reliability and limit the lifetime of a flash memory device. We aim to improve flash reliability with a multitude of low-cost…

Hardware Architecture · Computer Science 2018-08-16 Yixin Luo

Quad-level cell (QLC) flash offers significant benefits in cost and capacity, but its limited reliability leads to frequent read retries, which severely degrade read performance. A common strategy in high-density flash storage is to program…

Hardware Architecture · Computer Science 2025-08-28 Yanyun Wang , Dingcui Yu , Yina Lv , Yunpeng Song , Yumiao Zhao , Liang Shi

Energy-harvesting (EH) Internet of Things (IoT) devices operate under intermittent energy availability, which disrupts task execution and makes energy-intensive over-the-air (OTA) updates particularly challenging. Conventional OTA update…

Hardware Architecture · Computer Science 2026-01-26 Wei Wei , Jingye Xu , Sahidul Islam , Dakai Zhu , Chen Pan , Mimi Xie

Flash memory has been widely adopted as stand-alone memory and embedded memory due to its robust reliability. However, the limited endurance obstacles its further applications in storage class memory (SCM) and to proceed endurance-required…

Systems and Control · Electrical Eng. & Systems 2024-01-17 Yang Feng , Zhaohui Sun , Chengcheng Wang , Xinyi Guo , Junyao Mei , Yueran Qi , Jing Liu , Junyu Zhang , Jixuan Wu , Xuepeng Zhan , Jiezhi Chen

SSDs are emerging storage devices which unlike HDDs, do not have mechanical parts and therefore, have superior performance compared to HDDs. Due to the high cost of SSDs, entirely replacing HDDs with SSDs is not economically justified.…

Performance · Computer Science 2018-12-12 Reza Salkhordeh , Mostafa Hadizadeh , Hossein Asadi

The read channel of a Flash memory cell degrades after repetitive program and erase (P/E) operations. This degradation is often modeled as a function of the number of P/E cycles. In contrast, this paper models the degradation as a function…

Information Theory · Computer Science 2016-10-13 Haobo Wang , Nathan Wong , Tsung-Yi Chen , Richard D. Wesel

This paper summarizes our work on experimentally characterizing, mitigating, and recovering data retention errors in multi-level cell (MLC) NAND flash memory, which was published in HPCA 2015, and examines the work's significance and future…

Hardware Architecture · Computer Science 2018-05-09 Yu Cai , Yixin Luo , Erich F. Haratsch , Ken Mai , Saugata Ghose , Onur Mutlu

A primary source of increased read time on NAND flash comes from the fact that in the presence of noise, the flash medium must be read several times using different read threshold voltages for the decoder to succeed. This paper proposes an…

Information Theory · Computer Science 2022-02-14 Borja Peleato , Rajiv Agarwal , John Cioffi , Minghai Qin , Paul H. Siegel

Modern storage systems predominantly use flash-based SSDs as a cache layer due to their favorable performance and cost efficiency. However, in tiny-object workloads, existing flash cache designs still suffer from high write amplification.…

Hardware Architecture · Computer Science 2026-03-11 Xufeng Yang , Tingting Tan , Jingxin Hu , Congming Gao , Mingyang Liu , Tianyang Jiang , Jian Chen , Linbo Long , Yina Lv , Jiwu Shu

Currently, Burst buffer has been proposed to manage the SSD buffering of bursty write requests. Although burst buffer can improve I/O performance in many cases, we find that it has some limitations such as requiring large SSD capacity and…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-02-18 Xuanhua Shi , Wei Liu , Ligang He , Hai Jin , Ming Li , Yong Chen

Optimization remains a fundamental pillar of machine learning, yet existing methods often struggle to maintain stability and adaptability in dynamic, non linear systems, especially under uncertainty. We introduce AERO (Adversarial…

Machine Learning · Computer Science 2025-06-04 Karthikeyan Vaiapury

Due to increasing cache sizes and large leakage consumption of SRAM device, conventional SRAM caches contribute significantly to the processor power consumption. Recently researchers have used non-volatile memory devices to design caches,…

Hardware Architecture · Computer Science 2014-05-01 Sparsh Mittal

The robustness of event cameras to high dynamic range and motion blur holds the potential to improve visual odometry systems in challenging environments. Although their high temporal resolution does not require synchronous processing, most…

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