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In view of the large amount of calculation and long calculation time of convolutional neural network (CNN), this paper proposes a convolutional neural network hardware accelerator based on field programmable logic gate array (FPGA). First,…

Hardware Architecture · Computer Science 2020-12-08 Xiong Jun

We briefly introduce the memory based approaches to emulate machine intelligence in VLSI hardware, describing the challenges and advantages. Implementation of artificial intelligence techniques in VLSI hardware is a practical and difficult…

Artificial Intelligence · Computer Science 2012-01-31 Alex Pappachen James

Current soft processor architectures for FPGAs do not utilize the potential of the massive parallelism available. FPGAs now support many thousands of embedded floating point operators, and have similar computational densities to GPGPUs.…

Hardware Architecture · Computer Science 2024-01-10 Martin Langhammer , George A. Constantinides

Advanced feedforward control methods enable mechatronic systems to perform varying motion tasks with extreme accuracy and throughput. The aim of this paper is to develop a data-driven feedforward controller that addresses input…

Systems and Control · Electrical Eng. & Systems 2023-11-30 Jilles van Hulst , Maurice Poot , Dragan Kostić , Kai Wa Yan , Jim Portegies , Tom Oomen

Real-time systems, particularly those used in domains like automated driving, are increasingly adopting neural networks. From this trend arises the need for high-performance hardware exhibiting predictable timing behavior. While…

Hardware Architecture · Computer Science 2026-02-26 Maximilian Kirschner , Konstantin Dudzik , Ben Krusekamp , Jürgen Becker

Traditional geometric inverse kinematics methods for parallel mechanisms rely on specific spatial geometry constraints. However, their application to redundant parallel mechanisms is challenged due to the increased constraint complexity.…

Robotics · Computer Science 2025-12-30 Daqian Cao , Quan Yuan , Weibang Bai

In this paper, we present a novel general framework grounded in the factor graph theory to solve kinematic and dynamic problems for multi-body systems. Although the motion of multi-body systems is considered to be a well-studied problem and…

Robotics · Computer Science 2021-07-27 José-Luis Blanco-Claraco , Antonio Leanza , Giulio Reina

We propose a hardware-efficient RBD accelerator based on FPGA, introducing three key innovations. First, we propose a precision-aware quantization framework that reduces DSP demand while preserving motion accuracy. This is also the first…

Hardware Architecture · Computer Science 2025-11-25 Xingyu Liu , Jiawei Liang , Yipu Zhang , Linfeng Du , Chaofang Ma , Hui Yu , Jiang Xu , Wei Zhang

Domain-specialized FPGAs have delivered unprecedented performance for low-latency inference across scientific and industrial workloads, yet nearly all existing accelerators assume static models trained offline, relegating learning and…

Hardware Architecture · Computer Science 2026-02-03 Duc Hoang

Dynamic simulators are computational models governed by differential equations that evolve over time. They are essential for scientific and engineering applications but remain challenging to emulate because of the unpredictable behavior of…

Computation · Statistics 2025-08-12 Junoh Heo

In recent years there has been a growing interest in event cameras, i.e. vision sensors that record changes in illumination independently for each pixel. This type of operation ensures that acquisition is possible in very adverse lighting…

Computer Vision and Pattern Recognition · Computer Science 2025-03-11 Tomasz Kryjak

The increasing demand of dedicated accelerators to improve energy efficiency and performance has highlighted FPGAs as a promising option to deliver both. However, programming FPGAs in hardware description languages requires long time and…

Hardware Architecture · Computer Science 2020-03-31 Maria A. Dávila-Guzmán , Rubén Gran Tejero , María Villarroya-Gaudó , Darío Suárez Gracia

Field-Programmable Gate Arrays (FPGAs) are widely used in the central signal processing design of the Square Kilometre Array (SKA) as acceleration hardware. The frequency domain acceleration search (FDAS) module is an important part of the…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-07-02 Haomiao Wang , Prabu Thiagaraj , Oliver Sinnen

In this paper, we describe our approach to develop a simulation software application for the fully kinetic Vlasov equation which will be used to explore physics beyond the gyrokinetic model. Simulating the fully kinetic Vlasov equation…

Computational Physics · Physics 2023-11-23 Nils Schild , Mario Raeth , Sebastian Eibl , Klaus Hallatschek , Katharina Kormann

Domain-specific accelerators deliver exceptional performance on their target workloads through fabrication-time orchestrated datapaths. However, such specialized architectures often exhibit performance fragility when exposed to new kernels…

Hardware Architecture · Computer Science 2026-02-20 Zhenyu Bai , Pranav Dangi , Rohan Juneja , Zhaoying Li , Zhanglu Yan , Huiying Lan , Tulika Mitra

High-dimensional motion generation requires numerical precision for smooth, collision-free solutions. Typically, double-precision or single-precision floating-point (FP) formats are utilized. Using these for big tensors imposes a strain on…

We present a new adaptive parallel algorithm for the challenging problem of multi-dimensional numerical integration on massively parallel architectures. Adaptive algorithms have demonstrated the best performance, but efficient many-core…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-06-24 Ioannis Sakiotis , Kamesh Arumugam , Marc Paterno , Desh Ranjan , Balša Terzić , Mohammad Zubair

Lattice spin models are useful for studying critical phenomena and allow the extraction of equilibrium and dynamical properties. Simulations of such systems are usually based on Monte Carlo (MC) techniques, and the main difficulty is often…

Computational Physics · Physics 2012-09-13 Tal Levy , Guy Cohen , Eran Rabani

Tensor Processing Units (TPUs) are specialized hardware accelerators for deep learning developed by Google. This paper aims to explore TPUs in cloud and edge computing focusing on its applications in AI. We provide an overview of TPUs,…

Hardware Architecture · Computer Science 2023-11-15 Diego Sanmartín Carrión , Vera Prohaska

Accelerating Human Action Recognition (HAR) efficiently for real-time surveillance and robotic systems on edge chips remains a challenging research field, given its high computational and memory requirements. This paper proposed an…

Computer Vision and Pattern Recognition · Computer Science 2023-11-08 Azzam Alhussain , Mingjie Lin
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