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Processing-in-memory (PIM), as a novel computing paradigm, provides significant performance benefits from the aspect of effective data movement reduction. SRAM-based PIM has been demonstrated as one of the most promising candidates due to…

Hardware Architecture · Computer Science 2023-11-01 Cenlin Duan , Jianlei Yang , Xiaolin He , Yingjie Qi , Yikun Wang , Yiou Wang , Ziyan He , Bonan Yan , Xueyan Wang , Xiaotao Jia , Weitao Pan , Weisheng Zhao

Probabilistic reasoning is an essential tool for robust decision-making systems because of its ability to explicitly handle real-world uncertainty, constraints and causal relations. Consequently, researchers are developing hybrid models by…

Hardware Architecture · Computer Science 2021-03-02 Nimish Shah , Laura I. Galindez Olascoaga , Wannes Meert , Marian Verhelst

On-device CNN inference for real-time computer vision applications can result in computational demands that far exceed the energy budgets of mobile devices. This paper proposes FixyNN, a co-designed hardware accelerator platform which…

Machine Learning · Computer Science 2019-02-28 Paul Whatmough , Chuteng Zhou , Patrick Hansen , Matthew Mattina

Computing-in-memory (CIM) is renowned in deep learning due to its high energy efficiency resulting from highly parallel computing with minimal data movement. However, current SRAM-based CIM designs suffer from long latency for loading…

Recent advancements in quantization and mixed-precision approaches offers substantial opportunities to improve the speed and energy efficiency of Neural Networks (NN). Research has shown that individual parameters with varying low…

Hardware Architecture · Computer Science 2024-08-14 Giorgos Armeniakos , Alexis Maras , Sotirios Xydis , Dimitrios Soudris

Expanding Deep Learning applications toward edge computing demands architectures capable of delivering high computational performance and efficiency while adhering to tight power and memory constraints. Digital In-Memory Computing (DIMC)…

Hardware Architecture · Computer Science 2026-02-03 Tommaso Spagnolo , Cristina Silvano , Riccardo Massa , Filippo Grillotti , Thomas Boesch , Giuseppe Desoli

Training machine learning (ML) algorithms is a computationally intensive process, which is frequently memory-bound due to repeatedly accessing large training datasets. As a result, processor-centric systems (e.g., CPU, GPU) suffer from…

Hardware Architecture · Computer Science 2023-09-07 Juan Gómez-Luna , Yuxin Guo , Sylvan Brocard , Julien Legriel , Remy Cimadomo , Geraldo F. Oliveira , Gagandeep Singh , Onur Mutlu

Graph neural networks (GNNs) have gained significant interest for applications such as citation network analysis and drug discovery due to their ability to apply machine learning techniques on graph-structured data. GNNs typically employ a…

Hardware Architecture · Computer Science 2026-05-28 Siddhartha Raman Sundara Raman , Lizy John , Jaydeep P. Kulkarni

DNNs are widely used but face significant computational costs due to matrix multiplications, especially from data movement between the memory and processing units. One promising approach is therefore Processing-in-Memory as it greatly…

Hardware Architecture · Computer Science 2024-01-19 Lorenzo Sonnino , Shaswot Shresthamali , Yuan He , Masaaki Kondo

The paradigm shift towards local and on-device inference under stringent resource constraints is represented by the tiny machine learning (TinyML) domain. The primary goal of TinyML is to integrate intelligence into tiny, low-cost devices…

Processing-in-memory (PIM) architectures allow software to explicitly initiate computation in the memory. This effectively makes PIM operations a new class of memory operations, alongside standard memory operations (e.g., load, store). For…

Hardware Architecture · Computer Science 2022-12-08 Ben Perach , Ronny Ronnen , Shahar Kvatinsky

Mixed-precision neural network (MPNN) that utilizes just enough data width for the neural network processing is an effective approach to meet the stringent resources constraints including memory and computing of MCUs. Nevertheless, there is…

Hardware Architecture · Computer Science 2024-07-29 Junfeng Gong , Cheng Liu , Long Cheng , Huawei Li , Xiaowei Li

Custom dataflow Convolutional Neural Network (CNN) inference accelerators on FPGA are tailored to a specific CNN topology and store parameters in On-Chip Memory (OCM), resulting in high energy efficiency and low inference latency. However,…

Hardware Architecture · Computer Science 2020-11-17 Lucian Petrica , Tobias Alonso , Mairin Kroes , Nicholas Fraser , Sorin Cotofana , Michaela Blott

Graph pattern mining applications try to find all embeddings that match specific patterns. Compared to the traditional graph computation, graph mining applications are computation-intensive. The state-of-the-art method, pattern enumeration,…

Hardware Architecture · Computer Science 2021-04-20 Gengyu Rao , Jingji Chen , Jason Yik , Xuehai Qian

Single instruction, multiple data (SIMD) is a popular design style of in-memory computing (IMC) architectures, which enables memory arrays to perform logic operations to achieve low energy consumption and high parallelism. To implement a…

Emerging Technologies · Computer Science 2024-12-04 Xingyue Qian , Chen Nie , Zhezhi He , Weikang Qian

Many FPGAs vendors have recently included embedded processors in their devices, like Xilinx with ARM-Cortex A cores, together with programmable logic cells. These devices are known as Programmable System on Chip (PSoC). Their ARM cores…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-06-05 A. Rios-Navarro , R. Tapiador-Morales , A. Jimenez-Fernandez , M. Dominguez-Morales , C. Amaya , A. Linares-Barranco

Modern computing systems suffer from the dichotomy between computation on one side, which is performed only in the processor (and accelerators), and data storage/movement on the other, which all other parts of the system are dedicated to.…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-05-14 Onur Mutlu , Saugata Ghose , Juan Gómez-Luna , Rachata Ausavarungnirun

The capacity of offloading data and control tasks to the network is becoming increasingly important, especially if we consider the faster growth of network speed when compared to CPU frequencies. In-network compute alleviates the host CPU…

Networking and Internet Architecture · Computer Science 2021-06-02 Salvatore Di Girolamo , Andreas Kurth , Alexandru Calotoiu , Thomas Benz , Timo Schneider , Jakub Beránek , Luca Benini , Torsten Hoefler

Processing-in-memory (PIM) is a promising choice for accelerating deep neural networks (DNNs) featuring high efficiency and low power. However, the rapid upscaling of neural network model sizes poses a crucial challenge for the limited…

Hardware Architecture · Computer Science 2024-11-21 Ruibao Wang , Bonan Yan

Convolutional neural networks (CNNs) are one of the most successful machine learning techniques for image, voice and video processing. CNNs require large amounts of processing capacity and memory bandwidth. Hardware accelerators have been…

Hardware Architecture · Computer Science 2018-05-03 James Garland , David Gregg