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We report enhanced nonlinear optics in nanowires, waveguides, and ring resonators by introducing layered two-dimensional (2D) graphene oxide (GO) films through experimental demonstration. The GO films are integrated on silicon-on-insulator…
Short-wave infrared (SWIR) imaging arrays have demonstrated great potential in applications spanning from military to civilian consumer electronics. However, the current focal plane arrays (FPAs), which are based on compound semiconductors,…
To perform temporal and sequential machine learning tasks, the use of conventional Recurrent Neural Networks (RNNs) has been dwindling due to the training complexities of RNNs. To this end, accelerators for delayed feedback reservoir…
Neural-network (NN) inference is increasingly present on-board spacecraft to reduce downlink bandwidth and enable timely decision making. However, the power and reliability constraints of space missions limit the applicability of many…
Recently, crossbar array based in-memory accelerators have been gaining interest due to their high throughput and energy efficiency. While software and compiler support for the in-memory accelerators has also been introduced, they are…
Superpixels have long been used in image simplification to enable more efficient data processing and storage. However, despite their computational potential, their irregular spatial distribution has often forced deep learning approaches to…
The concept of Compressed Sensing-aided Space-Frequency Index Modulation (CS-SFIM) is conceived for the Large-Scale Multi-User Multiple-Input Multiple-Output Uplink (LS-MU-MIMO-UL) of Next-Generation (NG) networks. Explicitly, in CS-SFIM,…
Magnetic field errors pose a limitation in the performance of synchrotrons, as they excite non-systematic resonances, reduce dynamic aperture and may result in beam loss. Their effect can be compensated assuming knowledge of their location…
With unprecedented demand for generative AI (GenAI) inference, acceleration of primitives that dominate GenAI such as general matrix-vector multiplication (GEMV) is receiving considerable attention. A challenge with GEMVs is the high memory…
SRAM-based Analog Compute-in-Memory (ACiM) demonstrates promising energy efficiency for deep neural network (DNN) processing. Nevertheless, efforts to optimize efficiency frequently compromise accuracy, and this trade-off remains…
General matrix-vector multiplication (GeMV) remains a critical latency bottleneck in large language model (LLM) inference, even with quantized low-bit models. Processing-Using-DRAM (PUD), an analog in-DRAM computing technique, has the…
Matrix multiplication is a fundamental kernel in large-scale artificial intelligence and scientific computing, but its performance on conventional electronic accelerators is increasingly constrained by memory bandwidth and energy…
Achieving monolithic integration of passive acoustic wave devices, in particular RF filters, with active devices such as RF amplifiers and switches, is the optimal solution to meet the challenging communication requirements of mobile…
Next generation wireless networks focus on improving spectral efficiency (SE) while reducing power consumption and hardware cost. Reconfigurable intelligent surfaces (RISs) offer a viable solution to meet these requirements. In order to…
DL inference queries play an important role in diverse internet services and a large fraction of datacenter cycles are spent on processing DL inference queries. Specifically, the matrix-matrix multiplication (GEMM) operations of…
Real-time Deep Neural Network (DNN) inference with low-latency requirement has become increasingly important for numerous applications in both cloud computing (e.g., Apple's Siri) and edge computing (e.g., Google/Waymo's driverless car).…
Due to their narrow band gap and compatibility with silicon processing, germanium-tin (Ge$_{1-x}$Sn$_x$) alloys are a versatile platform for scalable integrated mid-infrared photonics. These semiconductors are typically grown on silicon…
Manufacturing-viable neuromorphic chips require novel computer architectures to achieve the massively parallel and efficient information processing the brain supports so effortlessly. Emerging event-based architectures are making this dream…
Traditional von Neumann architecture based processors become inefficient in terms of energy and throughput as they involve separate processing and memory units, also known as~\textit{memory wall}. The memory wall problem is further…
The majority of silicon photonics is built on silicon-on-insulator (SOI) wafers while the majority of electronics, including CPUs and memory, are built on bulk silicon wafers, limiting broader acceptance of silicon photonics. This…