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Emerging non-volatile memory (NVM)-based Computing-in-Memory (CiM) architectures show substantial promise in accelerating deep neural networks (DNNs) due to their exceptional energy efficiency. However, NVM devices are prone to device…

Machine Learning · Computer Science 2023-12-12 Zheyu Yan , Xiaobo Sharon Hu , Yiyu Shi

Deep neural networks (DNN) have demonstrated effectiveness for various applications such as image processing, video segmentation, and speech recognition. Running state-of-the-art DNNs on current systems mostly relies on either…

Neural and Evolutionary Computing · Computer Science 2019-04-15 Mohsen Imani , Mohammad Samragh , Yeseong Kim , Saransh Gupta , Farinaz Koushanfar , Tajana Rosing

The second-order training methods can converge much faster than first-order optimizers in DNN training. This is because the second-order training utilizes the inversion of the second-order information (SOI) matrix to find a more accurate…

Hardware Architecture · Computer Science 2022-10-28 Yilong Zhao , Li Jiang , Mingyu Gao , Naifeng Jing , Chengyang Gu , Qidong Tang , Fangxin Liu , Tao Yang , Xiaoyao Liang

Compute-in-memory (CiM) is a promising approach to improving the computing speed and energy efficiency in dataintensive applications. Beyond existing CiM techniques of bitwise logic-in-memory operations and dot product operations, this…

Hardware Architecture · Computer Science 2023-01-03 Yiming Chen , Yushen Fu , Mingyen Lee , Sumitha George , Yongpan Liu , Vijaykrishnan Narayanan , Huazhong Yang , Xueqing Li

Neural networks are an increasingly attractive algorithm for natural language processing and pattern recognition. Deep networks with >50M parameters are made possible by modern GPU clusters operating at <50 pJ per op and more recently,…

In recent years, Compute-in-memory (CiM) architectures have emerged as a promising solution for deep neural network (NN) accelerators. Multiply-accumulate~(MAC) is considered a {\textit de facto} unit operation in NNs. By leveraging the…

Signal Processing · Electrical Eng. & Systems 2026-01-05 Dhandeep Challagundla , Ignatius Bezzam , Riadul Islam

The exponential growth of artificial intelligence (AI) applications has exposed the inefficiency of conventional von Neumann architectures, where frequent data transfers between compute units and memory create significant energy and latency…

Hardware Architecture · Computer Science 2026-03-18 James Read , Ming-Yen Lee , Wei-Hsing Huang , Yuan-Chun Luo , Anni Lu , Shimeng Yu

Expanding Deep Learning applications toward edge computing demands architectures capable of delivering high computational performance and efficiency while adhering to tight power and memory constraints. Digital In-Memory Computing (DIMC)…

Hardware Architecture · Computer Science 2026-02-03 Tommaso Spagnolo , Cristina Silvano , Riccardo Massa , Filippo Grillotti , Thomas Boesch , Giuseppe Desoli

Deep neural networks generate and process large volumes of data, posing challenges for low-resource embedded systems. In-memory computing has been demonstrated as an efficient computing infrastructure and shows promise for embedded AI…

Emerging Technologies · Computer Science 2025-07-03 Benjamin Chen Ming Choong , Tao Luo , Cheng Liu , Bingsheng He , Wei Zhang , Joey Tianyi Zhou

The inherent diversity of computation types within the deep neural network (DNN) models often requires a variety of specialized units in hardware processors, which limits computational efficiency, increasing both inference latency and power…

Machine Learning · Computer Science 2024-08-21 Ruiqi Sun , Siwei Ye , Jie Zhao , Xin He , Jianzhe Lin , Yiran Li , An Zou

As deep neural network (DNN) models are growing exponentially in size, their deployment on resource-constrained edge platforms is becoming increasingly challenging. In-memory-computing (IMC) with non-volatile memories (NVMs) has emerged as…

Emerging Technologies · Computer Science 2026-04-07 Imtiaz Ahmed , Sumeet Kumar Gupta

Processing-in-memory (PIM) has emerged as the go to solution for addressing the von Neumann bottleneck in edge AI accelerators. However, state-of-the-art (SoTA) digital PIM approaches suffer from low compute density, primarily due to the…

Hardware Architecture · Computer Science 2025-10-23 Mukul Lokhande , Narendra Singh Dhakad , Seema Chouhan , Akash Sankhe , Santosh Kumar Vishvakarma

With the widespread use of Deep Neural Networks (DNNs), machine learning algorithms have evolved in two diverse directions -- one with ever-increasing connection density for better accuracy and the other with more compact sizing for energy…

Hardware Architecture · Computer Science 2021-07-07 Gokul Krishnan , Sumit K. Mandal , Chaitali Chakrabarti , Jae-sun Seo , Umit Y. Ogras , Yu Cao

Analog In-memory Computing (AIMC) has emerged as a highly efficient paradigm for accelerating Deep Neural Networks (DNNs), offering significant energy and latency benefits over conventional digital hardware. However, state-of-the-art neural…

Machine Learning · Computer Science 2025-06-24 Aniss Bessalah , Hatem Mohamed Abdelmoumen , Karima Benatchba , Hadjer Benmeziane

In-memory-computing is emerging as an efficient hardware paradigm for deep neural network accelerators at the edge, enabling to break the memory wall and exploit massive computational parallelism. Two design models have surged: analog…

Hardware Architecture · Computer Science 2023-05-31 Pouya Houshmand , Jiacong Sun , Marian Verhelst

Deep neural networks (DNN) are increasingly being accelerated on application-specific hardware such as the Google TPU designed especially for deep learning. Timing speculation is a promising approach to further increase the energy…

Machine Learning · Computer Science 2018-07-03 Jeff Zhang , Siddharth Garg

Developing accurate and reliable Compute-In-Memory (CIM) architectures is becoming a key research focus to accelerate Artificial Intelligence (AI) tasks on hardware, particularly Deep Neural Networks (DNNs). In that regard, there has been…

Hardware Architecture · Computer Science 2026-04-15 Omar Numan , Gaurav Singh , Kazybek Adam , Jelin Leslin , Aleksi Korsman , Otto Simola , Marko Kosunen , Jussi Ryynänen , Martin Andraud

Crossbar-based in-memory computing (IMC) has emerged as a promising platform for hardware acceleration of deep neural networks (DNNs). However, the energy and latency of IMC systems are dominated by the large overhead of the peripheral…

Hardware Architecture · Computer Science 2024-11-11 Ethan G Rogers , Sohan Salahuddin Mugdho , Kshemal Kshemendra Gupte , Cheng Wang

Retrieval-Augmented Generation (RAG) enhances large language models (LLMs) by integrating external knowledge retrieval but faces challenges on edge devices due to high storage, energy, and latency demands. Computing-in-Memory (CIM) offers a…

Analog Content Addressable Memories (aCAMs) have proven useful for associative in-memory computing applications like Decision Trees, Finite State Machines, and Hyper-dimensional Computing. While non-volatile implementations using FeFETs and…

Emerging Technologies · Computer Science 2024-10-15 Paul-Philipp Manea , Nathan Leroux , Emre Neftci , John Paul Strachan