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Recent advances in Deep Neural Networks (DNNs) have led to active development of specialized DNN accelerators, many of which feature a large number of processing elements laid out spatially, together with a multi-level memory hierarchy and…

Machine Learning · Computer Science 2021-05-06 Qijing Huang , Minwoo Kang , Grace Dinh , Thomas Norell , Aravind Kalaiah , James Demmel , John Wawrzynek , Yakun Sophia Shao

As machine learning applications continue to evolve, the demand for efficient hardware accelerators, specifically tailored for deep neural networks (DNNs), becomes increasingly vital. In this paper, we propose a configurable memory…

Hardware Architecture · Computer Science 2024-04-25 Oliver Bause , Paul Palomero Bernardo , Oliver Bringmann

The further development of deep neural networks is hampered by the limited GPU memory resource. Therefore, the optimization of GPU memory resources is highly demanded. Swapping and recomputation are commonly applied to make better use of…

Machine Learning · Computer Science 2022-06-22 Yu Tang , Chenyu Wang , Yufan Zhang , Yuliang Liu , Xingcheng Zhang , Linbo Qiao , Zhiquan Lai , Dongsheng Li

Modern Deep Neural Network (DNN) accelerators are equipped with increasingly larger on-chip buffers to provide more opportunities to alleviate the increasingly severe DRAM bandwidth pressure. However, most existing research on buffer…

Hardware Architecture · Computer Science 2025-01-23 Jingwei Cai , Xuan Wang , Mingyu Gao , Sen Peng , Zijian Zhu , Yuchen Wei , Zuotong Wu , Kaisheng Ma

In this paper, we present a novel technique to search for hardware architectures of accelerators optimized for end-to-end training of deep neural networks (DNNs). Our approach addresses both single-device and distributed pipeline and tensor…

Hardware Architecture · Computer Science 2024-04-24 Muhammad Adnan , Amar Phanishayee , Janardhan Kulkarni , Prashant J. Nair , Divya Mahajan

Memory is a critical design consideration in current data-intensive DNN accelerators, as it profoundly determines energy consumption, bandwidth requirements, and area costs. As DNN structures become more complex, a larger on-chip memory…

Hardware Architecture · Computer Science 2024-02-02 Zhanhong Tan , Zijian Zhu , Kaisheng Ma

We show that DNN accelerator micro-architectures and their program mappings represent specific choices of loop order and hardware parallelism for computing the seven nested loops of DNNs, which enables us to create a formal taxonomy of all…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-04-28 Xuan Yang , Mingyu Gao , Qiaoyi Liu , Jeff Ou Setter , Jing Pu , Ankita Nayak , Steven Emberton Bell , Kaidi Cao , Heonjae Ha , Priyanka Raina , Christos Kozyrakis , Mark Horowitz

Deep neural networks (DNN) use a wide range of network topologies to achieve high accuracy within diverse applications. This model diversity makes it impossible to identify a single "dataflow" (execution schedule) to perform optimally…

Hardware Architecture · Computer Science 2024-06-24 Man Shi , Steven Colleman , Charlotte VanDeMieroop , Antony Joseph , Maurice Meijer , Wim Dehaene , Marian Verhelst

Dedicated accelerators are being designed to address the huge resource requirement of the deep neural network (DNN) applications. The power, performance and area (PPA) constraints limit the number of MACs available in these accelerators.…

Hardware Architecture · Computer Science 2021-02-25 Mahesh Chandra

The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and…

Hardware Architecture · Computer Science 2023-12-21 Alireza Amirshahi , Giovanni Ansaloni , David Atienza

Deep Neural Networks (DNNs) have been established as the state-of-the-art algorithm for advanced machine learning applications. Recently proposed by the Google Brain's team, the Capsule Networks (CapsNets) have improved the generalization…

Machine Learning · Computer Science 2021-01-26 Alberto Marchisio , Vojtech Mrazek , Muhammad Abdullah Hanif , Muhammad Shafique

Deep learning (DL) workloads are moving towards accelerators for faster processing and lower cost. Modern DL accelerators are good at handling the large-scale multiply-accumulate operations that dominate DL workloads; however, it is…

With the widespread use of deep neural networks(DNNs) in intelligent systems, DNN accelerators with high performance and energy efficiency are greatly demanded. As one of the feasible processing-in-memory(PIM) architectures,…

Hardware Architecture · Computer Science 2023-12-22 Junpeng Wang , Mengke Ge , Bo Ding , Qi Xu , Song Chen , Yi Kang

Recent studies have demonstrated that near-data processing (NDP) is an effective technique for improving performance and energy efficiency of data-intensive workloads. However, leveraging NDP in realistic systems with multiple memory…

Hardware Architecture · Computer Science 2018-12-05 Hyojong Kim , Ramyad Hadidi , Lifeng Nai , Hyesoon Kim , Nuwan Jayasena , Yasuko Eckert , Onur Kayiran , Gabriel H. Loh

The research interest in specialized hardware accelerators for deep neural networks (DNN) spikes recently owing to their superior performance and efficiency. However, today's DNN accelerators primarily focus on accelerating specific…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-06-11 Cong Guo , Yangjie Zhou , Jingwen Leng , Yuhao Zhu , Zidong Du , Quan Chen , Chao Li , Bin Yao , Minyi Guo

In the hardware design space exploration process, it is critical to optimize both hardware parameters and algorithm-to-hardware mappings. Previous work has largely approached this simultaneous optimization problem by separately exploring…

Hardware Architecture · Computer Science 2025-09-16 Charles Hong , Qijing Huang , Grace Dinh , Mahesh Subedar , Yakun Sophia Shao

Recently, crossbar array based in-memory accelerators have been gaining interest due to their high throughput and energy efficiency. While software and compiler support for the in-memory accelerators has also been introduced, they are…

Hardware Architecture · Computer Science 2025-01-14 Jihoon Park , Jeongin Choe , Dohyun Kim , Jae-Joon Kim

The rapid deployment of deep neural network (DNN) accelerators in safety-critical domains such as autonomous vehicles, healthcare systems, and financial infrastructure necessitates robust mechanisms to safeguard data confidentiality and…

Cryptography and Security · Computer Science 2026-02-25 Wei Xuan , Zihao Xuan , Rongliang Fu , Ning Lin , Kwunhang Wong , Zikang Yuan , Lang Feng , Zhongrui Wang , Tsung-Yi Ho , Yuzhong Jiao , Luhong Liang

The energy and latency of an accelerator running a deep neural network (DNN) depend on how the computation and data movement are scheduled in the accelerator (i.e., mapping), and picking an optimal mapping is essential to achieve…

Hardware Architecture · Computer Science 2026-05-05 Michael Gilbert , Tanner Andrulis , Vivienne Sze , Joel S. Emer

In recent years, to sustain the resource-intensive computational needs for training deep neural networks (DNNs), it is widely accepted that exploiting the parallelism in large-scale computing clusters is critical for the efficient…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-05-31 Menglu Yu , Chuan Wu , Bo Ji , Jia Liu
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