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ESP is an open-source research platform for heterogeneous SoC design. The platform combines a modular tile-based architecture with a variety of application-oriented flows for the design and optimization of accelerators. The ESP architecture…

Energy efficiency and computing flexibility are some of the primary design constraints of heterogeneous computing. In this paper, we present FlashAbacus, a data-processing accelerator that self-governs heterogeneous kernel executions and…

Hardware Architecture · Computer Science 2018-05-09 Jie Zhang , Myoungsoo Jung

Recent innovations in Transformer-based large language models have significantly advanced the field of general-purpose neural language understanding and generation. With billions of trainable parameters, deployment of these large models…

Hardware Architecture · Computer Science 2024-10-11 Haocheng Xu , Faraz Tahmasebi , Ye Qiao , Hongzheng Tian , Hyoukjun Kwon , Sitao Huang

Field-Programmable Gate Arrays (FPGAs) have become essential in cloud computing due to their reconfigurability, energy efficiency, and ability to accelerate domain-specific workloads. As FPGA adoption grows, research into task scheduling…

Hardware Architecture · Computer Science 2025-11-11 Arsalan Ali Malik , John Buchanan , Aydin Aysu

Porting applications to new hardware or programming models is a tedious and error prone process. Every help that eases these burdens is saving developer time that can then be invested into the advancement of the application itself instead…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-11-07 Erik Zenker , Benjamin Worpitz , René Widera , Axel Huebl , Guido Juckeland , Andreas Knüpfer , Wolfgang E. Nagel , Michael Bussmann

The growing demand for efficient, high-performance processing in machine learning (ML) and image processing has made hardware accelerators, such as GPUs and Data Streaming Accelerators (DSAs), increasingly essential. These accelerators…

Hardware Architecture · Computer Science 2025-04-17 Qunyou Liu , Marina Zapater , David Atienza

In this paper, we describe the algorithms we implemented in FDPS to make efficient use of accelerator hardware such as GPGPUs. We have developed FDPS to make it possible for many researchers to develop their own high-performance parallel…

Instrumentation and Methods for Astrophysics · Physics 2020-02-12 Masaki Iwasawa , Daisuke Namekata , Keigo Nitadori , Kentaro Nomura , Long Wang , Miyuki Tsubouchi , Junichiro Makino

Region proposal is critical for object detection while it usually poses a bottleneck in improving the computation efficiency on traditional control-flow architectures. We have observed region proposal tasks are potentially suitable for…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-10-30 Wenzhi Fu , Jianlei Yang , Pengcheng Dai , Yiran Chen , Weisheng Zhao

Spatial dataflow architectures like the Cerebras Wafer-Scale Engine deliver exceptional performance in AI and scientific computing by distributing scratchpad memory across hundreds of thousands of processing elements (PEs). Yet programming…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-04-28 Lukas Gianinazzi , Tal Ben-Nun , Torsten Hoefler

Modular manipulators composed of pre-manufactured and interchangeable modules offer high adaptability across diverse tasks. However, their deployment requires generating feasible motions while jointly optimizing morphology and mounted pose…

High-performance computing (HPC) has evolved over decades through multiple architectural transitions, from vector supercomputers to massively parallel CPU clusters and GPU-accelerated systems, continuously expanding the frontier of…

Quantum Physics · Physics 2026-04-23 Suman Raj , Siva Sai , Yogesh Simmhan , Kyle Chard , Rajkumar Buyya

Transformers have revolutionized AI in natural language processing and computer vision, but their large computation and memory demands pose major challenges for hardware acceleration. In practice, end-to-end throughput is often limited by…

Hardware Architecture · Computer Science 2026-03-20 Qunyou Liu , Marina Zapater , David Atienza

Designing field-programmable gate array (FPGA)-based accelerators for modern artificial intelligence workloads requires navigating a large and complex hardware design space encompassing architectural parameters, dataflow strategies, and…

Hardware Architecture · Computer Science 2026-05-08 Vinamra Sharma , Xingjian Fu , Jude Haris , José Cano

The increase in open-source availability of Large Language Models (LLMs) has enabled users to deploy them on more and more resource-constrained edge devices to reduce reliance on network connections and provide more privacy. However, the…

Hardware Architecture · Computer Science 2024-08-02 Jude Haris , Rappy Saha , Wenhao Hu , José Cano

High Performance Computing (HPC) aims at providing reasonably fast computing solutions to scientific and real life problems. The advent of multicore architectures is noticeable in the HPC history, because it has brought the underlying…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-10-07 Claude Tadonki

Recently, cloud systems composed of heterogeneous hardware have been increased to utilize progressed hardware power. However, to program applications for heterogeneous hardware to achieve high performance needs much technical skill and is…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-09-18 Yoji Yamato

FPGA programming is more complex as compared to Central Processing Units (CPUs) and Graphics Processing Units (GPUs). The coding languages to define the abstraction of Register Transfer Level (RTL) in High Level Synthesis (HLS) for FPGA…

Hardware Architecture · Computer Science 2024-10-04 Rourab Paul , Alberto Ottimo , Marco Danelutto

FPGAs offer high performance, low latency, and energy efficiency for accelerated computing, yet adoption in scientific and edge settings is limited by the specialized hardware expertise required. High-level synthesis (HLS) boosts…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-02-09 Maxim Moraru , Kamalavasan Kamalakkannan , Jered Dominguez-Trujillo , Patrick Diehl , Atanu Barai , Julien Loiseau , Zachary Kent Baker , Howard Pritchard , Galen M Shipman

Modern scientific applications are increasingly decomposable into individual functions that may be deployed across distributed and diverse cyberinfrastructure such as supercomputers, clouds, and accelerators. Such applications call for new…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-09-11 Yifei Li , Ryan Chard , Yadu Babuji , Kyle Chard , Ian Foster , Zhuozhao Li

Heterogeneous computing is one of the most important computational solutions to meet rapidly increasing demands on system performance. It typically allows the main flow of applications to be executed on a CPU while the most computationally…

Software Engineering · Computer Science 2020-12-11 Hugo Andrade , Ola Benderius , Christian Berger , Ivica Crnkovic , Jan Bosch
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