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Recent advances in deep learning (DL) have led to a shift from traditional 64-bit floating point (FP64) computations toward reduced-precision formats, such as FP16, BF16, and 8- or 16-bit integers, combined with mixed-precision arithmetic.…

Computation and Language · Computer Science 2025-06-16 Héctor Martínez , Adrián Castelló , Francisco D. Igual , Enrique S. Quintana-Ortí

In recommendation systems, practitioners observed that increase in the number of embedding tables and their sizes often leads to significant improvement in model performances. Given this and the business importance of these models to major…

Machine Learning · Computer Science 2020-10-26 Jie Amy Yang , Jianyu Huang , Jongsoo Park , Ping Tak Peter Tang , Andrew Tulloch

In this work we have enhanced gem5's GPU model support to add Matrix Core Engines (MCEs). Specifically, on the AMD MI200 and MI300 GPUs that gem5 supports, these MCEs perform Matrix Fused Multiply Add (MFMA) instructions for a variety of…

Hardware Architecture · Computer Science 2025-02-04 Marco Kurzynski , Matthew D. Sinclair

Recent architectures integrate high-performance and power-efficient matrix engines. These engines demonstrate remarkable performance in low-precision matrix multiplication, which is crucial in deep learning. Several techniques have been…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-11-13 Yuki Uchino , Katsuhisa Ozaki , Toshiyuki Imamura

Deep neural networks (DNNs) have revolutionized the field of artificial intelligence and have achieved unprecedented success in cognitive tasks such as image and speech recognition. Training of large DNNs, however, is computationally…

A new field programmable gate array (FPGA)-based emulation platform is proposed to accelerate fault tolerance analysis of inference accelerators of convolutional neural networks (CNN). For a given CNN model, hardware accelerator…

Hardware Architecture · Computer Science 2025-07-23 Filip Masar , Vojtech Mrazek , Lukas Sekanina

Generic matrix multiplication (GEMM) and one-dimensional convolution/cross-correlation (CONV) kernels often constitute the bulk of the compute- and memory-intensive processing within image/audio recognition and matching systems. We propose…

Multimedia · Computer Science 2014-11-12 Mohammad Ashraful Anam , Paul N. Whatmough , Yiannis Andreopoulos

Large language models (LLMs) have been widely applied but face challenges in efficient inference. While quantization methods reduce computational demands, ultra-low bit quantization with arbitrary precision is hindered by limited GPU Tensor…

Machine Learning · Computer Science 2025-03-14 Shaobo Ma , Chao Fang , Haikuo Shao , Zhongfeng Wang

Deep learning hardware achieves high throughput and low power consumption by reducing computing precision and specializing in matrix multiplication. For machine learning inference, fixed-point value computation is commonplace, where the…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-04-02 Hiroyuki Ootomo , Katsuhisa Ozaki , Rio Yokota

Software fault localization remains challenging due to limited feature diversity and low precision in traditional methods. This paper proposes a novel approach that integrates multi-objective optimization with deep learning models to…

Software Engineering · Computer Science 2024-11-27 Xiaolei Hu , Dongcheng Li , W. Eric Wong , Ya Zou

Nowadays, the extensive exploitation of Deep Neural Networks (DNNs) in safety-critical applications raises new reliability concerns. In practice, methods for fault injection by emulation in hardware are efficient and widely used to study…

Machine Learning · Computer Science 2023-06-01 Mahdi Taheri , Mohammad Hasan Ahmadilivani , Maksim Jenihhin , Masoud Daneshtalab , Jaan Raik

Deep learning models typically use single-precision (FP32) floating point data types for representing activations and weights, but a slew of recent research work has shown that computations with reduced-precision data types (FP16, 16-bit…

Machine Learning · Computer Science 2021-01-15 Daya Khudia , Jianyu Huang , Protonu Basu , Summer Deng , Haixin Liu , Jongsoo Park , Mikhail Smelyanskiy

Within the past years, hardware vendors have started designing low precision special function units in response to the demand of the Machine Learning community and their demand for high compute power in low precision formats. Also the…

GEneral Matrix Multiply (GEMM) is a central operation in deep learning and corresponds to the largest chunk of the compute footprint. Therefore, improving its efficiency is an active topic of ongoing research. A popular strategy is the use…

Machine Learning · Computer Science 2024-03-13 Zhanpeng Zeng , Karthikeyan Sankaralingam , Vikas Singh

Modern AI accelerators rely on matrix multiply-accumulate units (MMAUs), such as NVIDIA Tensor Cores and AMD Matrix Cores, to accelerate deep neural network workloads. MMAUs expose only instruction-level or API-level interfaces of matrix…

Hardware Architecture · Computer Science 2026-04-17 Peichen Xie , Shuotao Xu , Yang Wang , Fan Yang , Mao Yang

General Matrix Multiplication or GEMM kernels take centre place in high performance computing and machine learning. Recent NVIDIA GPUs include GEMM accelerators, such as NVIDIA's Tensor Cores. Their exploitation is hampered by the…

Mathematical Software · Computer Science 2021-11-23 Thomas Faingnaert , Tim Besard , Bjorn De Sutter

Graphics processing units (GPUs) are the de facto standard for processing deep learning (DL) tasks. Meanwhile, GPU failures, which are inevitable, cause severe consequences in DL tasks: they disrupt distributed trainings, crash inference…

Machine Learning · Computer Science 2022-01-31 Heting Liu , Zhichao Li , Cheng Tan , Rongqiu Yang , Guohong Cao , Zherui Liu , Chuanxiong Guo

While GPU clusters are the de facto choice for training large deep neural network (DNN) models today, several reasons including ease of workflow, security and cost have led to efforts investigating whether CPUs may be viable for inference…

Machine Learning · Computer Science 2024-03-13 Zhanpeng Zeng , Michael Davies , Pranav Pulijala , Karthikeyan Sankaralingam , Vikas Singh

The NVIDIA Volta GPU microarchitecture introduces a specialized unit, called "Tensor Core" that performs one matrix-multiply-and-accumulate on 4x4 matrices per clock cycle. The NVIDIA Tesla V100 accelerator, featuring the Volta…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-12-18 Stefano Markidis , Steven Wei Der Chien , Erwin Laure , Ivy Bo Peng , Jeffrey S. Vetter

General Matrix Multiplication (GEMM) has a wide range of applications in scientific simulation and artificial intelligence. Although traditional libraries can achieve high performance on large regular-shaped GEMMs, they often behave not…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-08-12 Shangfei Yin , Qinglin Wang , Ruochen Hao , Tianyang Zhou , Songzhu Mei , Jie Liu