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Slow feature analysis (SFA) is a method for extracting slowly varying features from a quickly varying multidimensional signal. An open source Matlab-implementation sfa-tk makes SFA easily useable. We show here that under certain…
Heterogeneous hardware other than small-core CPU such as GPU, FPGA, or many-core CPU is increasingly being used. However, heterogeneous hardware usage presents high technical skill barriers such as familiarity with CUDA. To overcome this…
We proposes a platform which can generate hardware/software description based on flexible in-struction set architectures (ISAs). The platform takes advantage of the flexibility of field pro-grammable gate array (FPGA) to design many micro…
Functional Principal Components Analysis (FPCA) is a widely used analytic tool for dimension reduction of functional data. Traditional implementations of FPCA estimate the principal components from the data, then treat these estimates as…
Neuroevolution is a powerful method of applying an evolutionary algorithm to refine the performance of artificial neural networks through natural selection; however, the fitness evaluation of these networks can be time-consuming and…
Conventionally, Selective Harmonic Elimination (SHE) method in 2-level inverters, finds best switching angles to reach first voltage harmonic to reference level and eliminate other harmonics, simultaneously. Considering Induction Motor (IM)…
Fast and Relaxed Vector Fitting (FRVF) is a frequency-domain system identification approach that has been widely adopted in electrical system modelling, while its application to mechanical systems has remained relatively unexplored. In this…
With the rapid development of radar jamming systems, especially digital radio frequency memory (DRFM), the electromagnetic environment has become increasingly complex. In recent years, most existing studies have focused solely on either…
In recent years, heterogeneous computing has emerged as the vital way to increase computers? performance and energy efficiency by combining diverse hardware devices, such as Graphics Processing Units (GPUs) and Field Programmable Gate…
This paper presents a real-time, energy-efficient embedded system implementing an array of Cascade of Asymmetric Resonators with Fast-Acting Compression (CARFAC) cochlea models for underwater sound analysis. Built on the AMD Kria KV260…
This paper presents a complete video fusion system with hardware acceleration and investigates the energy trade-offs between computing in the CPU or the FPGA device. The video fusion application is based on the Dual-Tree Complex Wavelet…
In next generation wireless communication system, wireless transceivers should be able to handle wideband input signals compromising of multiple communication standards.Such multi-standard wireless communication receivers (MWCRs) need…
We present a robust synthesis algorithm for uncertain linear time-varying (LTV) systems on finite horizons. The uncertain system is described as an interconnection of a known LTV system and a perturbation. The input-output behavior of the…
The relaxation time of several second generation molecular motors is analysed by calculating the minimum energy path between the metastable and stable states and evaluating the transition rate within harmonic transition state theory based…
Growing global concerns about climate change highlight the need for environmentally sustainable computing. The ecological impact of computing, including operational and embodied, is a key consideration. Field Programmable Gate Arrays…
The electrical grid is evolving from a network consisting of mostly synchronous machines to a mixture of synchronous machines and inverter-based resources such as wind, solar, and energy storage. This transformation has led to a decrease in…
A commitment to condition monitoring involves the operators of plant in the conduct of a range of activities. These activities may be compli-cated in nature and indeed may often be performed automatically under computer control. They can,…
In this paper, the field programmable gate array (FPGA) implementation of a fetal heart rate (FHR) monitoring system is presented. The system comprises of a preprocessing unit to remove various types of noise, followed by a fetal…
We present our development experience and recent results for the MLPerf Tiny Inference Benchmark on field-programmable gate array (FPGA) platforms. We use the open-source hls4ml and FINN workflows, which aim to democratize AI-hardware…
The use of reconfigurable computing, and FPGAs in particular, to accelerate computational kernels has the potential to be of great benefit to scientific codes and the HPC community in general. However, whilst recent advanced in FPGA tooling…