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This research introduces an FPGA-based hardware accelerator to optimize the Singular Value Decomposition (SVD) and Fast Fourier transform (FFT) operations in AI models. The proposed design aims to improve processing speed and reduce…

Hardware Architecture · Computer Science 2025-04-15 Hong Ding , Chia Chao Kang , SuYang Xi , Zehang Liu , Xuan Zhang , Yi Ding

In this paper, we propose a mixed-precision convolution unit architecture which supports different integer and floating point (FP) precisions. The proposed architecture is based on low-bit inner product units and realizes higher precision…

Hardware Architecture · Computer Science 2021-01-29 Hamzah Abdel-Aziz , Ali Shafiee , Jong Hoon Shin , Ardavan Pedram , Joseph H. Hassoun

Pre-trained language models (PLMs) have achieved remarkable results on NLP tasks but at the expense of huge parameter sizes and the consequent computational costs. In this paper, we propose Variator, a parameter-efficient acceleration…

Computation and Language · Computer Science 2024-02-21 Chaojun Xiao , Yuqi Luo , Wenbin Zhang , Pengle Zhang , Xu Han , Yankai Lin , Zhengyan Zhang , Ruobing Xie , Zhiyuan Liu , Maosong Sun , Jie Zhou

Gaussian Processes (GPs) are expressive models for capturing signal statistics and expressing prediction uncertainty. As a result, the robotics community has gathered interest in leveraging these methods for inference, planning, and…

Robotics · Computer Science 2023-08-29 Francesco Crocetti , Jeffrey Mao , Alessandro Saviolo , Gabriele Costante , Giuseppe Loianno

Deploying mixed-precision neural networks on edge devices is friendly to hardware resources and power consumption. To support fully mixed-precision neural network inference, it is necessary to design flexible hardware accelerators for…

Hardware Architecture · Computer Science 2025-02-04 Liang Zhao , Kunming Shao , Fengshi Tian , Tim Kwang-Ting Cheng , Chi-Ying Tsui , Yi Zou

We present FPRaker, a processing element for composing training accelerators. FPRaker processes several floating-point multiply-accumulation operations concurrently and accumulates their result into a higher precision accumulator. FPRaker…

The NVIDIA Volta GPU microarchitecture introduces a specialized unit, called "Tensor Core" that performs one matrix-multiply-and-accumulate on 4x4 matrices per clock cycle. The NVIDIA Tesla V100 accelerator, featuring the Volta…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-12-18 Stefano Markidis , Steven Wei Der Chien , Erwin Laure , Ivy Bo Peng , Jeffrey S. Vetter

The computation of time-optimal velocity profiles along prescribed paths, subject to generic acceleration constraints, is a crucial problem in robot trajectory planning, with particular relevance to autonomous racing. However, the existing…

Robotics · Computer Science 2026-01-08 Mattia Piazza , Mattia Piccinini , Sebastiano Taddei , Francesco Biral , Enrico Bertolazzi

Neural Radiance Fields (NeRF), an AI-driven approach for 3D view reconstruction, has demonstrated impressive performance, sparking active research across fields. As a result, a range of advanced NeRF models has emerged, leading on-device…

Hardware Architecture · Computer Science 2025-05-13 Seock-Hwan Noh , Banseok Shin , Jeik Choi , Seungpyo Lee , Jaeha Kung , Yeseong Kim

Video Diffusion Transformers have revolutionized high-fidelity video generation but suffer from the massive computational burden of self-attention. While sparse attention provides a promising acceleration solution, existing methods…

Computer Vision and Pattern Recognition · Computer Science 2026-04-15 Wentai Zhang , Ronghui Xi , Shiyao Peng , Jiayu Huang , Haoran Luo , Zichen Tang , Haihong E

The increasing demand for on-device training of deep neural networks (DNNs) aims to leverage personal data for high-performance applications while addressing privacy concerns and reducing communication latency. However, resource-constrained…

Hardware Architecture · Computer Science 2026-03-31 Jinming Lu , Jiayi Tian , Hai Li , Ian Young , Zheng Zhang

Block Floating Point (BFP) can efficiently support quantization for Deep Neural Network (DNN) training by providing a wide dynamic range via a shared exponent across a group of values. In this paper, we propose a Fast First, Accurate Second…

Machine Learning · Computer Science 2021-11-01 Sai Qian Zhang , Bradley McDanel , H. T. Kung

Neuromorphic accelerators promise unparalleled energy efficiency and computational density for spiking neural networks (SNNs), especially in edge intelligence applications. However, most existing platforms exhibit rigid architectures with…

Hardware Architecture · Computer Science 2026-02-23 Mohammad Farahani , Mohammad Rasoul Roshanshah , Saeed Safari

Many artificial intelligence models process input data of different lengths and resolutions, making the shape of the tensors dynamic. The performance of these models depends on the shape of the tensors, which makes it difficult to optimize…

Machine Learning · Computer Science 2024-08-01 Pengyu Mu , Linquan Wei , Yi Liu , Rui Wang

Many recent computational accelerators provide non-standard (e.g., reduced precision) arithmetic operations to enhance performance for floating-point matrix multiplication. Unfortunately, the properties of these accelerators are not widely…

Hardware Architecture · Computer Science 2025-02-25 Benjamin Valpey , Xinyi Li , Sreepathi Pai , Ganesh Gopalakrishnan

Training large transformers is slow, but recent innovations on GPU architecture give us an advantage. NVIDIA Ampere GPUs can execute a fine-grained 2:4 sparse matrix multiplication twice as fast as its dense equivalent. In the light of this…

Machine Learning · Computer Science 2024-10-29 Yuezhou Hu , Kang Zhao , Weiyu Huang , Jianfei Chen , Jun Zhu

This paper proposes Capstan: a scalable, parallel-patterns-based, reconfigurable dataflow accelerator (RDA) for sparse and dense tensor applications. Instead of designing for one application, we start with common sparse data formats, each…

Hardware Architecture · Computer Science 2021-09-24 Alexander Rucker , Matthew Vilim , Tian Zhao , Yaqi Zhang , Raghu Prabhakar , Kunle Olukotun

A novel inline data compression method is presented for single-precision vectors in three dimensions. The primary application of the method is for accelerating computational physics calculations where the throughput is bound by memory…

Computational Engineering, Finance, and Science · Computer Science 2020-06-25 Will Trojak , Freddie Witherden

Accurate simulations of various physical processes on digital computers requires huge computing performance, therefore accelerating these scientific and engineering applications has a great importance. Density of programmable logic devices…

Performance · Computer Science 2014-08-26 Zoltan Nagy , Csaba Nemes , Antal Hiba , Arpad Csik , Andras Kiss , Miklos Ruszinko , Peter Szolgay

Robotic manipulators operating in dynamic and uncertain environments require efficient motion planning to navigate obstacles while maintaining smooth trajectories. Velocity Potential Field (VPF) planners offer real-time adaptability but…

Robotics · Computer Science 2025-04-10 Ho Minh Quang Ngo , Dac Dang Khoa Nguyen , Dinh Tung Le , Gavin Paul