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Compiling high-level programs to target high-speed packet-processing pipelines is a challenging combinatorial optimization problem. The compiler must configure the pipeline's resources to match the high-level semantics of the program, while…

Networking and Internet Architecture · Computer Science 2022-11-22 Xiangyu Gao , Divya Raghunathan , Ruijie Fang , Tao Wang , Xiaotong Zhu , Anirudh Sivaraman , Srinivas Narayana , Aarti Gupta

In the domain of image processing, often real-time constraints are required. In particular, in safety-critical applications, such as X-ray computed tomography in medical imaging or advanced driver assistance systems in the automotive…

Programming Languages · Computer Science 2015-02-27 Oliver Reiche , Konrad Häublein , Marc Reichenbach , Frank Hannig , Jürgen Teich , Dietmar Fey

Real time data acquisition systems in nuclear science often rely on high-speed logic designs to reach the fast data rate requirements. They are mostly coded in a hardware description language (HDL). However, in recent years, high level…

Instrumentation and Detectors · Physics 2018-06-29 Tétrault Marc-André

FPGA accelerators designed for graph processing are gaining popularity. Domain Specific Language (DSL) frameworks for graph processing can reduce the programming complexity and development cost of algorithm design. However,…

Hardware Architecture · Computer Science 2022-02-28 Jing Wang , Jinyang Guo , Chao Li

Molecular dynamics (MD) simulation is one of the past decade's most important tools for enabling biology scientists and researchers to explore human health and diseases. However, due to the computation complexity of the MD algorithm, it…

Computational Physics · Physics 2016-11-15 Jason Cong , Zhenman Fang , Hassan Kianinejad , Peng Wei

Spatial computing architectures promise a major stride in performance and energy efficiency over the traditional load/store devices currently employed in large scale computing systems. The adoption of high-level synthesis (HLS) from…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-11-24 Johannes de Fine Licht , Maciej Besta , Simon Meierhans , Torsten Hoefler

Problem Statement: Field Programmable Gate Array (FPGA) circuits play a significant role in major recent embedded process control designs. However, exploiting these platforms requires deep hardware conception skills and remains an important…

Systems and Control · Computer Science 2013-12-20 Ahmed Ben Achballah , Slim Ben Othman , Slim Ben Saoud

Field-programmable gate arrays (FPGAs) provide an opportunity to co-design applications with hardware accelerators, yet they remain difficult to program. High-level synthesis (HLS) tools promise to raise the level of abstraction by…

Programming Languages · Computer Science 2021-11-17 Rachit Nigam , Sachille Atapattu , Samuel Thomas , Zhijing Li , Theodore Bauer , Yuwei Ye , Apurva Koti , Adrian Sampson , Zhiru Zhang

Spatial computing architectures pose an attractive alternative to mitigate control and data movement overheads typical of load-store architectures. In practice, these devices are rarely considered in the HPC community due to the steep…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-04-23 Tiziano De Matteis , Johannes de Fine Licht , Torsten Hoefler

Fortran is the oldest high-level programming language that remains in use today and is one of the dominant languages used for compute-intensive scientific and engineering applications. However, Fortran has not kept up with the modern…

In last two years, large language models (LLMs) have shown strong capabilities in code generation, including hardware design at register-transfer level (RTL). While their use in high-level synthesis (HLS) remains comparatively less mature,…

Hardware Architecture · Computer Science 2026-01-29 M Zafir Sadik Khan , Kimia Azar , Hadi Kamali

The rise of automated code generation tools, such as large language models (LLMs), has introduced new challenges in ensuring the correctness and efficiency of scientific software, particularly in complex kernels, where numerical stability,…

Programming Languages · Computer Science 2025-01-17 Naifeng Zhang , Sanil Rao , Mike Franusich , Franz Franchetti

High-Level Synthesis (HLS) plays a crucial role in modern hardware design by transforming high-level code into optimized hardware implementations. However, progress in applying machine learning (ML) to HLS optimization has been hindered by…

Hardware Architecture · Computer Science 2025-08-05 Zedong Peng , Zeju Li , Mingzhe Gao , Qiang Xu , Chen Zhang , Jieru Zhao

Hyperspectral imaging is gathering significant attention due to its potential in various domains such as geology, agriculture, ecology, and surveillance. However, the associated processing algorithms, which are essential for enhancing…

Signal Processing · Electrical Eng. & Systems 2023-10-04 El Mehdi Abdali , Daniele Picone , Mauro Dalla-Mura , Stéphane Mancini

In this work we evaluate the potential of FPGAs for accelerating HPC workloads as a more power-efficient alternative to GPUs. Using High-Level Synthesis and a large set of optimization techniques, we show that FPGAs can achieve better…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-09-17 Hamid Reza Zohouri

As the interest in FPGA-based accelerators for HPC applications increases, new challenges also arise, especially concerning different programming and portability issues. This paper aims to provide a snapshot of the current state of the FPGA…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-09-06 Manuel de Castro , Francisco J. andújar , Roberto R. Osorio , Rocío Carratalá-Sáez , Diego R. Llanos

Large Language Models (LLMs) have demonstrated remarkable potential in hardware front-end design using hardware description languages (HDLs). However, their inherent tendency toward hallucination often introduces functional errors into the…

Artificial Intelligence · Computer Science 2025-11-21 Kangwei Xu , Grace Li Zhang , Ulf Schlichtmann , Bing Li

Large Language Models (LLMs) have demonstrated strong capabilities in general-purpose code generation. However, generating the code which is deeply hardware-specific, architecture-aware, and performance-critical, especially for massively…

Machine Learning · Computer Science 2025-06-12 Wentao Chen , Jiace Zhu , Qi Fan , Yehan Ma , An Zou

The increasing complexity of large-scale FPGA accelerators poses significant challenges in achieving high performance while maintaining design productivity. High-level synthesis (HLS) has been adopted as a solution, but the mismatch between…

Hardware Architecture · Computer Science 2024-10-18 Jason Lau , Yuanlong Xiao , Yutong Xie , Yuze Chi , Linghao Song , Shaojie Xiang , Michael Lo , Zhiru Zhang , Jason Cong , Licheng Guo

Dynamic programming (DP) based algorithms are essential yet compute-intensive parts of numerous bioinformatics pipelines, which typically involve populating a 2-D scoring matrix based on a recursive formula, optionally followed by a…

Hardware Architecture · Computer Science 2024-11-07 Yingqi Cao , Anshu Gupta , Jason Liang , Yatish Turakhia