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Modern computing systems face security threats, including memory corruption attacks, speculative execution vulnerabilities, and control-flow hijacking. Although existing solutions address these threats individually, they frequently…

Cryptography and Security · Computer Science 2025-12-19 Suraj Kumar Sah , Love Kumar Sah

RISC-V is a promising open-source architecture primarily targeted for embedded systems. Programs compiled using the RISC-V toolchain can run bare-metal on the system, and, as such, can be vulnerable to several memory corruption…

Cryptography and Security · Computer Science 2021-05-19 Asmit De , Swaroop Ghosh

Widespread use of memory unsafe programming languages (e.g., C and C++) leaves many systems vulnerable to memory corruption attacks. A variety of defenses have been proposed to mitigate attacks that exploit memory errors to hijack the…

Cryptography and Security · Computer Science 2018-03-13 Thomas Nyman , Ghada Dessouky , Shaza Zeitouni , Aaro Lehikoinen , Andrew Paverd , N. Asokan , Ahmad-Reza Sadeghi

Memory vulnerabilities are a major threat to many computing systems. To effectively thwart spatial and temporal memory vulnerabilities, full logical memory safety is required. However, current mitigation techniques for memory safety are…

Cryptography and Security · Computer Science 2021-03-10 Pascal Nasahl , Robert Schilling , Mario Werner , Jan Hoogerbrugge , Marcel Medwed , Stefan Mangard

Memory safety bugs remain in the top ranks of security vulnerabilities, even after decades of research on their detection and prevention. Various mitigations have been proposed for C/C++, ranging from language dialects to instrumentation.…

Cryptography and Security · Computer Science 2023-05-12 Konrad Hohentanner , Philipp Zieris , Julian Horsch

Recent technological advancements have proliferated the use of small embedded devices for collecting, processing, and transferring the security-critical information. The Internet of Things (IoT) has enabled remote access and control of…

Cryptography and Security · Computer Science 2021-01-19 Avani Dave , Nilanjan Banerjee , Chintan Patel

The increasing complexity of autonomous systems has driven a shift to integrated heterogeneous SoCs with real-time and safety demands. Ensuring deterministic WCETs and low-latency for critical tasks requires minimizing interference on…

Hardware Architecture · Computer Science 2025-04-09 Christopher Reinwardt , Robert Balas , Alessandro Ottaviano , Angelo Garofalo , Luca Benini

Expanding Deep Learning applications toward edge computing demands architectures capable of delivering high computational performance and efficiency while adhering to tight power and memory constraints. Digital In-Memory Computing (DIMC)…

Hardware Architecture · Computer Science 2026-02-03 Tommaso Spagnolo , Cristina Silvano , Riccardo Massa , Filippo Grillotti , Thomas Boesch , Giuseppe Desoli

The emergence of a new, open, and free instruction set architecture, RISC-V, has heralded a new era in microprocessor architectures. Starting with low-power, low-performance prototypes, the RISC-V community has a good chance of moving…

Performance · Computer Science 2023-09-06 Valentin Volokitin , Evgeny Kozinov , Valentina Kustikova , Alexey Liniov , Iosif Meyerov

In the last decade, we have witnessed exponential growth in the complexity of control systems for safety-critical applications (automotive, robots, industrial automation) and their transition to heterogeneous mixed-criticality systems…

Hardware Architecture · Computer Science 2024-06-12 Michael Rogenmoser , Alessandro Ottaviano , Thomas Benz , Robert Balas , Matteo Perotti , Angelo Garofalo , Luca Benini

Modern data-driven applications expose limitations of von Neumann architectures - extensive data movement, low throughput, and poor energy efficiency. Accelerators improve performance but lack flexibility and require data transfers.…

Hardware Architecture · Computer Science 2025-04-09 Vincenzo Petrolo , Flavia Guella , Michele Caon , Pasquale Davide Schiavone , Guido Masera , Maurizio Martina

Cryptographic operations are critical for securing IoT, edge computing, and autonomous systems. However, current RISC-V platforms lack efficient hardware support for comprehensive cryptographic algorithm families and post-quantum…

Hardware Architecture · Computer Science 2026-02-05 Anh Kiet Pham , Van Truong Vo , Vu Trung Duong Le , Tuan Hai Vu , Hoai Luan Pham , Van Tinh Nguyen , Yasuhiko Nakashima

To satisfy automotive safety and security requirements, memory protection mechanisms are an essential component of automotive microcontrollers. In today's available systems, either a fully physical address-based protection is implemented…

Hardware Architecture · Computer Science 2025-04-08 Konrad Walluszik , Daniel Auge , Gerhard Wirrer , Holm Rauchfuss , Thomas Roecker

The CHERI architecture equips conventional RISC ISAs with significant architectural extensions that provide a hardware-enforced mechanism for memory protection and software compartmentalisation. Architectural capabilities replace…

Hardware Architecture · Computer Science 2025-02-10 Louis-Emile Ploix , Alasdair Armstrong , Tom Melham , Ray Lin , Haolong Wang , Anastasia Courtney

Rust is an emerging programing language that aims at preventing memory-safety bugs without sacrificing much efficiency. The claimed property is very attractive to developers, and many projects start using the language. However, can Rust…

Programming Languages · Computer Science 2021-02-26 Hui Xu , Zhuangbin Chen , Mingshen Sun , Yangfan Zhou , Michael Lyu

Memory-safety attacks have been one of the most critical threats against computing systems. Although a wide-range of defense techniques have been developed against these attacks, the existing mitigation strategies have several limitations.…

Cryptography and Security · Computer Science 2019-09-20 Eyasu Getahun Chekole , Unnikrishnan Cheramangalath , Sudipta Chattopadhyay , Martin Ochoa , Guo Huaqun

Memory safety in C and C++ remains largely unresolved. A technique usually called "memory tagging" may dramatically improve the situation if implemented in hardware with reasonable overhead. This paper describes two existing implementations…

Cryptography and Security · Computer Science 2018-02-27 Kostya Serebryany , Evgenii Stepanov , Aleksey Shlyapnikov , Vlad Tsyrklevich , Dmitry Vyukov

Capability machines such as CHERI provide memory capabilities that can be used by compilers to provide security benefits for compiled code (e.g., memory safety). The existing C to CHERI compiler, for example, achieves memory safety by…

Programming Languages · Computer Science 2021-05-05 Akram El-Korashy , Stelios Tsampas , Marco Patrignani , Dominique Devriese , Deepak Garg , Frank Piessens

Rust is one of the most promising systems programming languages to fundamentally solve the memory safety issues that have plagued low-level software for over forty years. However, to accommodate the scenarios where Rust's type rules might…

Cryptography and Security · Computer Science 2024-05-28 Jie Zhou , Mingshen Sun , John Criswell

Memory safety has long been a critical challenge in software engineering, particularly for legacy systems written in memory-unsafe languages such as C and C++. Rust, one of the youngest modern programming languages, offers built-in…

Software Engineering · Computer Science 2026-04-20 Sarah Bedell , Nazanin Siavash , Armin Moin
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