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Parallel algorithms on CPU and GPU are implemented for the Unified Gas-Kinetic Scheme and their performances are investigated and compared by a two dimensional channel flow case. The parallel CPU algorithm has a one dimensional block…

Computational Physics · Physics 2018-11-02 Jizhou Liu , Fang Q. Hu , Xiaodong Li

With the rapid advancement of artificial intelligence technologies such as ChatGPT, AI agents, and video generation, contemporary mobile systems have begun integrating these AI capabilities on local devices to enhance privacy and reduce…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-10-07 Le Chen , Dahu Feng , Erhu Feng , Yingrui Wang , Rong Zhao , Yubin Xia , Pinjie Xu , Haibo Chen

Security of embedded computing systems is becoming of paramount concern as these devices become more ubiquitous, contain personal information and are increasingly used for financial transactions. Security attacks targeting embedded systems…

Hardware Architecture · Computer Science 2015-11-09 Roshan G. Ragel , Jude A. Ambrose , Sri Parameswaran

Traditional graphics processing units (GPUs) suffer from the low memory capacity and demand for high memory bandwidth. To address these challenges, we propose Ohm-GPU, a new optical network based heterogeneous memory design for GPUs.…

Hardware Architecture · Computer Science 2021-09-14 Jie Zhang , Myoungsoo Jung

This paper provides an in-depth characterization of GPU-accelerated systems, to understand the interplay between overlapping computation and communication which is commonly employed in distributed training settings. Due to the large size of…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-08 Seonho Lee , Jihwan Oh , Junkyum Kim , Seokjin Go , Jongse Park , Divya Mahajan

The latest trends in high-performance computing systems show an increasing demand on the use of a large scale multicore systems in a efficient way, so that high compute-intensive applications can be executed reasonably well. However, the…

Distributed, Parallel, and Cluster Computing · Computer Science 2013-02-25 Juliana M. N. Silva , Cristina Boeres , Lúcia M. A. Drummond , Artur A. Pessoa

Complex applications running on multicore processors show a rich performance phenomenology. The growing number of cores per ccNUMA domain complicates performance analysis of memory-bound code since system noise, load imbalance, or…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-11-03 Ayesha Afzal , Georg Hager , Gerhard Wellein

Many high end and next generation computing systems to incorporated alternative memory technologies to meet performance goals. Since these technologies present distinct advantages and tradeoffs compared to conventional DDR* SDRAM, such as…

Performance · Computer Science 2021-10-06 M. Ben Olson , Brandon Kammerdiener , Kshitij A. Doshi , Terry Jones , Michael R. Jantz

Next-generation mixed-criticality Systems-on-chip (SoCs) for robotics, automotive, and space must execute mixed-criticality AI-enhanced sensor processing and control workloads, ensuring reliable and time-predictable execution of critical…

Memory management is necessary with the increasing number of multi-connected AI devices and data bandwidth issues. For this purpose, high-speed multi-port memory is used. The traditional multi-port memory solutions are hard-bounded to a…

Hardware Architecture · Computer Science 2024-11-08 Narendra Singh Dhakad , Santosh Kumar Vishvakarma

Hyperdimensional computing (HDC) is an emerging computing paradigm that represents, manipulates, and communicates data using very long random vectors (aka hypervectors). Among different hardware platforms capable of executing HDC…

Hardware Architecture · Computer Science 2022-05-24 Robert Guirado , Abbas Rahimi , Geethan Karunaratne , Eduard Alarcón , Abu Sebastian , Sergi Abadal

Manycore processors feature a high number of general-purpose cores designed to work in a multithreaded fashion. Recent manycore processors are kept coherent using scalable distributed directories. A paramount example is the Intel Mesh…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-11-12 Steve Kommrusch , Marcos Horro , Louis-Noël Pouchet , Gabriel Rodríguez , Juan Touriño

Multi-core architectures can be leveraged to allow independent processes to run in parallel. However, due to resources shared across cores, such as caches, distinct processes may interfere with one another, e.g. affecting execution time.…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-09-17 Dan Iorga , Tyler Sorensen , Alastair F. Donaldson

Modern multicore system-on-chips (SoCs) share off-chip DRAM across cores, where bank-level interference can significantly degrade performance and threaten real-time guarantees. While prior work has focused on per-core bandwidth regulation,…

Hardware Architecture · Computer Science 2026-03-30 Connor Rudy Sullivan , Amin Mamandipoor , Cole Ridge Strickler , Heechul Yun

GPU computing is embracing weak memory concurrency for performance improvement. However, compared to CPUs, modern GPUs provide more fine-grained concurrency features such as scopes, have additional properties like divergence, and thereby…

Logic in Computer Science · Computer Science 2025-05-27 Soham Chakraborty , S. Krishna , Andreas Pavlogiannis , Omkar Tuppe

Intel OptaneTM DC Persistent Memory resides on the memory bus and approaches DRAM in access latency. One avenue for its adoption is to employ it in place of persistent storage; another is to use it as a cheaper and denser extension of DRAM.…

Hardware Architecture · Computer Science 2022-05-30 Alexandra Fedorova , Keith Smith , Keith Bostic , Alexander Gorrod , Sue LoVerso , Michael Cahill

For high throughput applications, turbo-like iterative decoders are implemented with parallel architectures. However, to be efficient parallel architectures require to avoid collision accesses i.e. concurrent read/write accesses should not…

Hardware Architecture · Computer Science 2010-02-23 Cyrille Chavet , Philippe Coussy , Eric Martin , Pascal Urard

Graphics Processing Units (GPUs) consisting of Streaming Multiprocessors (SMs) achieve high throughput by running a large number of threads and context switching among them to hide execution latencies. The number of thread blocks, and hence…

Hardware Architecture · Computer Science 2015-06-08 Vishwesh Jatala , Jayvant Anantpur , Amey Karkare

In-memory computing architectures provide a much needed solution to energy-efficiency barriers posed by Von-Neumann computing due to the movement of data between the processor and the memory. Functions implemented in such in-memory…

Hardware Architecture · Computer Science 2020-06-24 Sina Sayyah Ensan , Karthikeyan Nagarajan , Mohammad Nasim Imtia Khan , Swaroop Ghosh

The rapid growth of data-intensive applications such as generative AI, scientific simulations, and large-scale analytics is driving modern supercomputers and data centers toward increasingly heterogeneous and tightly integrated…

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