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The sizes of GPU applications are rapidly growing. They are exhausting the compute and memory resources of a single GPU, and are demanding the move to multiple GPUs. However, the performance of these applications scales sub-linearly with…

Hardware Architecture · Computer Science 2020-08-11 Saiful A. Mojumder , Yifan Sun , Leila Delshadtehrani , Yenai Ma , Trinayan Baruah , José L. Abellán , John Kim , David Kaeli , Ajay Joshi

With the imminent slowing down of DRAM scaling, Phase Change Memory (PCM) is emerging as a lead alternative for main memory technology. While PCM achieves low energy due to various technology-specific advantages, PCM is significantly slower…

Hardware Architecture · Computer Science 2015-04-17 Hamza Bin Sohail , Balajee Vamanan , T. N. Vijaykumar

Using memory located on remote machines, or far memory, as a swap space is a promising approach to meet the increasing memory demands of modern datacenter applications. Operating systems have long relied on prefetchers to mask the increased…

Large Language Models (LLMs) rely on Key-Value (KV) caching to accelerate inference, and many serving systems further share the KV cache across users' requests to reduce redundant computation. While widely adopted, unrestricted cross-user…

Cryptography and Security · Computer Science 2026-05-25 Guanlong Wu , Zhaohan li , Yao Zhang , Zheng Zhang , Jianyu Niu , Ye Wu , Yinqian Zhang

Hardware memory disaggregation (HMD) is an emerging technology that enables access to remote memory, thereby creating expansive memory pools and reducing memory underutilization in datacenters. However, a significant challenge arises when…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-03-25 Archit Patke , Christian Pinto , Saurabh Jha , Haoran Qiu , Zbigniew Kalbarczyk , Ravishankar Iyer

This paper presents GMEM, generalized memory management, for peripheral devices. GMEM provides OS support for centralized memory management of both CPU and devices. GMEM provides a high-level interface that decouples MMU-specific functions.…

Operating Systems · Computer Science 2023-10-20 Weixi Zhu , Alan L. Cox , Scott Rixner

The emerging hybrid DRAM-NVM architecture is challenging the existing memory management mechanism in operating system. In this paper, we introduce memos, which can schedule memory resources over the entire memory hierarchy including cache,…

Operating Systems · Computer Science 2017-03-23 Lei Liu , Mengyao Xie , Hao Yang

Software managed byte-addressable hybrid memory systems consisting of DRAMs and NVMMs offer a lot of flexibility to design efficient large scale data processing applications. Operating systems (OS) play an important role in enabling the…

Operating Systems · Computer Science 2023-10-06 Shivank Garg , Aravinda Prasad , Debadatta Mishra , Sreenivas Subramoney

In most modern systems, the memory subsystem is managed and accessed at multiple different granularities at various resources. We observe that such multi-granularity management results in significant inefficiency in the memory subsystem.…

Hardware Architecture · Computer Science 2016-05-23 Vivek Seshadri

Tiered memory architectures have gained significant traction in the database community in recent years. In these architectures, the on-chip DRAM of the host processor is typically referred to as local memory, and forms the primary tier.…

Databases · Computer Science 2026-03-04 Yeasir Rayhan , Walid G. Aref

This paper shows that cache-based optimizations are often ineffective in cloud virtual machines (VMs) due to limited visibility into and control over provisioned caches. In public clouds, CPU caches can be partitioned or shared among VMs,…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-03 Mani Tofigh , Edward Guo , Weiwei Jia , Xiaoning Ding , Zirui Neil Zhao , Jianchen Shan

Cloud platforms today have been deploying hardware accelerators like neural processing units (NPUs) for powering machine learning (ML) inference services. To maximize the resource utilization while ensuring reasonable quality of service, a…

Hardware Architecture · Computer Science 2024-09-16 Yuqi Xue , Yiqi Liu , Lifeng Nai , Jian Huang

The continued growth of the computational capability of throughput processors has made throughput processors the platform of choice for a wide variety of high performance computing applications. Graphics Processing Units (GPUs) are a prime…

Hardware Architecture · Computer Science 2018-05-01 Rachata Ausavarungnirun

Traditionally, DBMSs separate their storage layer from their indexing layer. While the storage layer physically materializes the database and provides low-level access methods to it, the indexing layer on top enables a faster locating of…

Databases · Computer Science 2022-12-07 Felix Schuhknecht , Justus Henneberg

Large pages are commonly deployed to reduce address translation overheads for big-memory workloads. Modern x86-64 processors from Intel and AMD support two large page sizes -- 1GB and 2MB. However, previous works on large pages have…

Operating Systems · Computer Science 2020-11-25 Venkat Sri Sai Ram , Ashish Panwar , Arkaprava Basu

Processing-in-memory (PIM) has emerged as a promising solution for accelerating memory-intensive workloads as they provide high memory bandwidth to the processing units. This approach has drawn attention not only from the academic community…

Hardware Architecture · Computer Science 2024-09-11 Dongjae Lee , Bongjoon Hyun , Taehun Kim , Minsoo Rhu

Gradient-based hyperparameter optimization has earned a widespread popularity in the context of few-shot meta-learning, but remains broadly impractical for tasks with long horizons (many gradient steps), due to memory scaling and gradient…

Machine Learning · Computer Science 2021-10-01 Paul Micaelli , Amos Storkey

Memory tiering systems seek cost-effective memory scaling by adding multiple tiers of memory. For maximum performance, frequently accessed (hot) data must be placed close to the host in faster tiers and infrequently accessed (cold) data can…

Operating Systems · Computer Science 2025-08-07 Sujay Yadalam , Konstantinos Kanellis , Michael Swift , Shivaram Venkataraman

Processing large numbers of key/value lookups is an integral part of modern server databases and other "Big Data" applications. Prior work has shown that hash table based key/value lookups can benefit significantly from using a dedicated…

Hardware Architecture · Computer Science 2021-05-17 Joshua Landgraf , Scott Lloyd , Maya Gokhale

It is significant to apply load-balancing strategy to improve the performance and reliability of resource in data centers. One of the challenging scheduling problems in Cloud data centers is to take the allocation and migration of…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-08-27 Minxian Xu , Guangchun Luo , Ling Tian , Aiguo Chen , Yaqiu Jiang , Guozhong Li , Wenhong Tian