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Stochastic computing (SC) offers hardware simplicity but suffers from low throughput, while high-throughput Digital Computing-in-Memory (DCIM) is bottlenecked by costly adder logic for matrix-vector multiplication (MVM). To address this…

Hardware Architecture · Computer Science 2026-01-13 Kunming Shao , Liang Zhao , Jiangnan Yu , Zhipeng Liao , Xiaomeng Wang , Yi Zou , Tim Kwang-Ting Cheng , Chi-Ying Tsui

This paper presents a novel architecture utilizing a 10T SRAM cell for XNOR-based in-memory computing, aimed at mitigating the extensive routing challenges typically encountered in conventional in-memory computing systems. By integrating a…

Hardware Architecture · Computer Science 2026-05-18 Narendra Singh Dhakad , Santosh Kumar Vishvakarma

The need to repeatedly shuttle around synaptic weight values from memory to processing units has been a key source of energy inefficiency associated with hardware implementation of artificial neural networks. Analog in-memory computing…

Large language models (LLMs) have demonstrated exceptional proficiency in understanding and generating human language, but efficient inference on resource-constrained embedded devices remains challenging due to large model sizes and…

Hardware Architecture · Computer Science 2025-07-15 Weihong Xu , Haein Choi , Po-kai Hsu , Shimeng Yu , Tajana Rosing

Artificial intelligence (AI) models are currently driven by a significant upscaling of their complexity, with massive matrix-multiplication workloads representing the major computational bottleneck. In-memory computing (IMC) architectures…

Hardware Architecture · Computer Science 2026-04-23 Shady Agwa , Yihan Pan , Georgios Papandroulidakis , Themis Prodromakis

Computing-in-memory (CIM) is renowned in deep learning due to its high energy efficiency resulting from highly parallel computing with minimal data movement. However, current SRAM-based CIM designs suffer from long latency for loading…

We present FlexLLM, a composable High-Level Synthesis (HLS) library for rapid development of domain-specific LLM accelerators. FlexLLM exposes key architectural degrees of freedom for stage-customized inference, enabling hybrid designs that…

Hardware Architecture · Computer Science 2026-01-23 Jiahao Zhang , Zifan He , Nicholas Fraser , Michaela Blott , Yizhou Sun , Jason Cong

SRAM Processing-in-Memory (PIM) has emerged as the most promising implementation for high-performance PIM, delivering superior computing density, energy efficiency, and computational precision. However, the pursuit of higher performance…

Hardware Architecture · Computer Science 2025-11-07 Yuanpeng Zhang , Xing Hu , Xi Chen , Zhihang Yuan , Cong Li , Jingchen Zhu , Zhao Wang , Chenguang Zhang , Xin Si , Wei Gao , Qiang Wu , Runsheng Wang , Guangyu Sun

Processing in-memory (PIM) is promising to accelerate neural networks (NNs) because it minimizes data movement and provides large computational parallelism. Similar to machine learning accelerators, application mapping, which determines the…

Hardware Architecture · Computer Science 2024-07-02 Xuan Wang , Minxuan Zhou , Tajana Rosing

Deploying Large Language Models (LLMs) efficiently on edge devices is often constrained by limited memory capacity and high power consumption. Low-bit quantization methods, particularly ternary quantization, have demonstrated significant…

Hardware Architecture · Computer Science 2025-05-02 Chenyang Yin , Zhenyu Bai , Pranav Venkatram , Shivam Aggarwal , Zhaoying Li , Tulika Mitra

The need to efficiently execute different Deep Neural Networks (DNNs) on the same computing platform, coupled with the requirement for easy scalability, makes Multi-Chip Module (MCM)-based accelerators a preferred design choice. Such an…

Hardware Architecture · Computer Science 2024-08-26 Abhijit Das , Enrico Russo , Maurizio Palesi

Autonomous machines (e.g., vehicles, mobile robots, drones) require sophisticated 3D mapping to perceive the dynamic environment. However, maintaining a real-time 3D map is expensive both in terms of compute and memory requirements,…

Hardware Architecture · Computer Science 2022-05-09 Tianyu Jia , En-Yu Yang , Yu-Shun Hsiao , Jonathan Cruz , David Brooks , Gu-Yeon Wei , Vijay Janapa Reddi

Content addressable memory (CAM) stands out as an efficient hardware solution for memory-intensive search operations by supporting parallel computation in memory. However, developing a CAM-based accelerator architecture that achieves…

Hardware Architecture · Computer Science 2024-03-11 Mengyuan Li , Shiyi Liu , Mohammad Mehdi Sharifi , X. Sharon Hu

With the rapid growth of deep neural networks (DNNs), compute-in-memory (CIM) has emerged as a promising energy-efficient paradigm for accelerating multiply-and-accumulate (MAC) operations. Yet, current CIM architectures are largely limited…

Hardware Architecture · Computer Science 2026-04-16 Subhradip Chakraborty , Ankur Singh , Akhilesh R. Jaiswal

General matrix-matrix multiplication (GEMM) is a fundamental operation in machine learning (ML) applications. We present the first comprehensive performance acceleration of GEMM workloads on AMD's second-generation AIE-ML (AIE2)…

Hardware Architecture · Computer Science 2025-09-01 Kaustubh Mhatre , Endri Taka , Aman Arora

Sparse matrix-dense matrix multiplication (SpMM) is a critical kernel in both scientific computing and emerging graph learning workloads. The recent Armv9 architecture introduces Scalable Matrix Extension (SME), enabling tile-based matrix…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-11-14 Kelun Lei , Hailong Yang , Kaige Zhang , Kejie Ma , Yiqing Wang , Xin You , Yufan Xu , Enrique S. Quintana-Orti , Zhongzhi Luan , Yi Liu , Depei Qian

This Article presents two optimized multi-GPU algorithms for Fock matrix construction, building on the work of Ufimtsev et al. and Barca et al. The novel algorithms, opt-UM and opt-Brc, introduce significant enhancements, including improved…

Computational Physics · Physics 2024-08-01 Elise Palethorpe , Ryan Stocks , Giuseppe M. J. Barca

There is an ongoing effort to develop tools that apply distributed computational resources to tackle large problems or reduce the time to solve them. In this context, the Alternating Direction Method of Multipliers (ADMM) arises as a method…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-03-09 Ning Hao , AmirReza Oghbaee , Mohammad Rostami , Nate Derbinsky , José Bento

The accuracy of neural networks has greatly improved across various domains over the past years. Their ever-increasing complexity, however, leads to prohibitively high energy demands and latency in von Neumann systems. Several…

Hardware Architecture · Computer Science 2024-01-24 João Paulo C. de Lima , Asif Ali Khan , Luigi Carro , Jeronimo Castrillon

Parameterizable machine learning (ML) accelerators are the product of recent breakthroughs in ML. To fully enable their design space exploration (DSE), we propose a physical-design-driven, learning-based prediction framework for…

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