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DNNs are widely used but face significant computational costs due to matrix multiplications, especially from data movement between the memory and processing units. One promising approach is therefore Processing-in-Memory as it greatly…

Hardware Architecture · Computer Science 2024-01-19 Lorenzo Sonnino , Shaswot Shresthamali , Yuan He , Masaaki Kondo

Memory resources in data centers generally suffer from low utilization and lack of dynamics. Memory disaggregation solves these problems by decoupling CPU and memory, which currently includes approaches based on RDMA or interconnection…

Hardware Architecture · Computer Science 2023-02-23 Chenjiu Wang , Ke He , Ruiqi Fan , Xiaonan Wang , Yang Kong , Wei Wang , Qinfen Hao

The rapid adoption of large language models (LLMs) is pushing AI accelerators toward increasingly powerful and specialized designs. Instead of further complicating software development with deeply hierarchical scratchpad memories (SPMs) and…

Hardware Architecture · Computer Science 2025-12-09 Zhongchun Zhou , Chengtao Lai , Yuhang Gu , Wei Zhang

Considering the diverse nature of real-world distributed applications that makes it hard to identify a representative subset of distributed benchmarks, we focus on their underlying distributed algorithms. We present and characterize a new…

Distributed, Parallel, and Cluster Computing · Computer Science 2013-10-11 Suyash Gupta , V. Krishna Nandivada

Processing-in-memory (PIM) architectures bring computation closer to data, reducing the processor-memory transfer bottleneck in traditional processor-centric designs. Novel hardware solutions, such as UPMEM's in-memory processing…

Emerging Technologies · Computer Science 2026-04-10 Peterson Yuhala , Mpoki Mwaisela , Pascal Felber , Valerio Schiavoni

With emerging storage-class memory (SCM) nearing commercialization, there is evidence that it will deliver the much-anticipated high density and access latencies within only a few factors of DRAM. Nevertheless, the latency-sensitive nature…

Many computer systems for calculating the proper organization of memory are among the most critical issues. Using a tier cache memory (along with branching prediction) is an effective means of increasing modern multi-core processors'…

Networking and Internet Architecture · Computer Science 2021-05-21 Mohamed A. Hamada , Abdelrahman Abdallah

Dynamic random access memory (DRAM) is critical to classical computing but notably absent in current superconducting quantum processors. Integrating high-coherence memory units would enable resource-efficient control of logical qubits and…

Memory disaggregation is promising to scale memory capacity and improves utilization in HPC systems. However, the performance overhead of accessing remote memory poses a significant challenge, particularly for compute-intensive HPC…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-03 Haoyu Zheng , Shouwei Gao , Jie Ren , Wenqian Dong

Resource disaggregation offers a cost effective solution to resource scaling, utilization, and failure-handling in data centers by physically separating hardware devices in a server. Servers are architected as pools of processor, memory,…

Hardware Architecture · Computer Science 2023-01-20 Christina Giannoula , Kailong Huang , Jonathan Tang , Nectarios Koziris , Georgios Goumas , Zeshan Chishti , Nandita Vijaykumar

Over the last three decades, innovations in the memory subsystem were primarily targeted at overcoming the data movement bottleneck. In this paper, we focus on a specific market trend in memory technology: 3D-stacked memory and caches. We…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-10-17 Jens Domke , Emil Vatai , Balazs Gerofi , Yuetsu Kodama , Mohamed Wahib , Artur Podobas , Sparsh Mittal , Miquel Pericàs , Lingqi Zhang , Peng Chen , Aleksandr Drozd , Satoshi Matsuoka

Graphical simulations are a cornerstone of modern media and films. But existing software packages are designed to run on HPC nodes, and perform poorly in the computing cloud. These simulations have complex data access patterns over complex…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-06-08 Omid Mashayekhi , Chinmayee Shah , Hang Qu , Andrew Lim , Philip Levis

With the increased demand on economy and efficiency of measurement technology, Non-Intrusive Load Monitoring (NILM) has received more and more attention as a cost-effective way to monitor electricity and provide feedback to users. Deep…

Machine Learning · Computer Science 2020-09-28 Gan Zhou , Zhi Li , Meng Fu , Yanjun Feng , Xingyao Wang , Chengwei Huang

This paper presents our work on designing a parallel platform for large-scale reservoir simulations. Detailed components, such as grid and linear solver, and data structures are introduced, which can serve as a guide to parallel reservoir…

Computational Engineering, Finance, and Science · Computer Science 2018-09-05 Hui Liu , Kun Wang , Bo Yang , Zhangxin Chen

The Adapteva Epiphany many-core architecture comprises a scalable 2D mesh Network-on-Chip (NoC) of low-power RISC cores with minimal uncore functionality. Whereas such a processor offers high computational energy efficiency and parallel…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-04-28 David Richie , James Ross , Jamie Infantolino

Tiered memory architectures have gained significant traction in the database community in recent years. In these architectures, the on-chip DRAM of the host processor is typically referred to as local memory, and forms the primary tier.…

Databases · Computer Science 2026-03-04 Yeasir Rayhan , Walid G. Aref

Advances in hybrid bonding and packaging have driven growing interest in 3D DRAM-stacked accelerators with higher memory bandwidth and capacity. As LLMs scale to hundreds of billions or trillions of parameters, distributed inference across…

A conventional data center that consists of monolithic-servers is confronted with limitations including lack of operational flexibility, low resource utilization, low maintainability, etc. Resource disaggregation is a promising solution to…

Operating Systems · Computer Science 2020-10-27 Ryousei Takano , Kuniyasu Suzaki

Many modern workloads, such as neural networks, databases, and graph processing, are fundamentally memory-bound. For such workloads, the data movement between main memory and CPU cores imposes a significant overhead in terms of both latency…

Hardware Architecture · Computer Science 2022-05-06 Juan Gómez-Luna , Izzat El Hajj , Ivan Fernandez , Christina Giannoula , Geraldo F. Oliveira , Onur Mutlu

The growing demand for efficient, high-performance processing in machine learning (ML) and image processing has made hardware accelerators, such as GPUs and Data Streaming Accelerators (DSAs), increasingly essential. These accelerators…

Hardware Architecture · Computer Science 2025-04-17 Qunyou Liu , Marina Zapater , David Atienza