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Most investigations into near-memory hardware accelerators for deep neural networks have primarily focused on inference, while the potential of accelerating training has received relatively little attention so far. Based on an in-depth…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-10-18 Fabian Schuiki , Michael Schaffner , Frank K. Gürkaynak , Luca Benini

Reducing latency and energy consumption is critical to improving the efficiency of memory systems in modern computing. This work introduces ReLMXEL (Reinforcement Learning for Memory Controller with Explainable Energy and Latency…

Hardware Architecture · Computer Science 2026-03-19 Panuganti Chirag Sai , Gandholi Sarat , R. Raghunatha Sarma , Venkata Kalyan Tavva , Naveen M

The attention layer, a core component of Transformer-based LLMs, brings out inefficiencies in current GPU systems due to its low operational intensity and the substantial memory requirements of KV caches. We propose a High-bandwidth…

Hardware Architecture · Computer Science 2025-12-19 Myunghyun Rhee , Joonseop Sim , Taeyoung Ahn , Seungyong Lee , Daegun Yoon , Euiseok Kim , Kyoung Park , Youngpyo Joo , Hoshik Kim

Deep learning has significantly advanced the state of the art in artificial intelligence, gaining wide popularity from both industry and academia. Special interest is around Convolutional Neural Networks (CNN), which take inspiration from…

Computer Vision and Pattern Recognition · Computer Science 2016-09-30 R. Tapiador , A. Rios-Navarro , A. Linares-Barranco , Minkyu Kim , Deepak Kadetotad , Jae-sun Seo

CUDA Unified Memory improves the GPU programmability and also enables GPU memory oversubscription. Recently, two advanced memory features, memory advises and asynchronous prefetch, have been introduced. In this work, we evaluate the new…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-03-03 Steven W. D. Chien , Ivy B. Peng , Stefano Markidis

Memory and logic integration on the same chip is becoming increasingly cost effective, creating the opportunity to offload data-intensive functionality to processing units placed inside memory chips. The introduction of memory-side…

Hardware Architecture · Computer Science 2017-08-23 Javier Picorel , Djordje Jevdjic , Babak Falsafi

Running language models in the browser presents a unique opportunity to build efficient, private, and portable AI applications, but requires contending with constrained memory availability and heterogeneous hardware targets. To realize this…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-21 Reese Levine , Rithik Sharma , Nikhil Jain , Abhijit Ramesh , Zheyuan Chen , Neha Abbas , James Contini , Tyler Sorensen

Emerging multimodal LLMs (MLLMs) exhibit strong cross-modality perception and reasoning capabilities and hold great potential for various applications at edge. However, MLLMs typically consist of a compute-intensive modality encoder and a…

Hardware Architecture · Computer Science 2025-05-19 Kangbo Bai , Le Ye , Ru Huang , Tianyu Jia

Aligning future system design with the ever-increasing compute needs of large language models (LLMs) is undoubtedly an important problem in today's world. Here, we propose a general performance modeling methodology and workload analysis of…

Hardware Architecture · Computer Science 2024-07-23 Joyjit Kundu , Wenzhe Guo , Ali BanaGozar , Udari De Alwis , Sourav Sengupta , Puneet Gupta , Arindam Mallik

Memory disaggregation can potentially allow memory-optimized range indexes such as B+-trees to scale beyond one machine while attaining high hardware utilization and low cost. Designing scalable indexes on disaggregated memory, however, is…

Databases · Computer Science 2024-05-24 Baotong Lu , Kaisong Huang , Chieh-Jan Mike Liang , Tianzheng Wang , Eric Lo

Non-volatile memory (NVM) is a promising technology for low-energy and high-capacity main memory of computers. The characteristics of NVM devices, however, tend to be fundamentally different from those of DRAM (i.e., the memory device…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-01-08 Atsushi Koshiba , Takahiro Hirofuchi , Ryousei Takano , Mitaro Namiki

Many modern workloads such as neural network inference and graph processing are fundamentally memory-bound. For such workloads, data movement between memory and CPU cores imposes a significant overhead in terms of both latency and energy. A…

Hardware Architecture · Computer Science 2023-04-04 Juan Gómez-Luna , Izzat El Hajj , Ivan Fernandez , Christina Giannoula , Geraldo F. Oliveira , Onur Mutlu

Modern out-of-order processors have increased capacity to exploit instruction level parallelism (ILP) and memory level parallelism (MLP), e.g., by using wide superscalar pipelines and vector execution units, as well as deep buffers for…

Programming Languages · Computer Science 2018-07-05 Vladimir Kiriansky , Haoran Xu , Martin Rinard , Saman Amarasinghe

The ability to scale out training workloads has been one of the key performance enablers of deep learning. The main scaling approach is data-parallel GPU-based training, which has been boosted by hardware and software support for highly…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-01-02 Ilia Markov , Hamidreza Ramezanikebrya , Dan Alistarh

We investigate the feasibility of using Multimodal Large Language Models (MLLMs) for real-time online episodic memory question answering. While cloud offloading is common, it raises privacy and latency concerns for wearable assistants,…

Computer Vision and Pattern Recognition · Computer Science 2026-05-14 Giuseppe Lando , Rosario Forte , Antonino Furnari

With a recent trend of using Large Language Models (LLMs) for different applications within smart cities, there is a need for pushing these models toward the edge of network while still preserving their performance. Edge Computing (EC) as a…

Machine Learning · Computer Science 2025-03-04 Minoo Hosseinzadeh , Hana Khamfroush

Recent advances in reprogrammable hardware (e.g., FPGAs) and memory technology (e.g., DDR4, HBM) promise to solve performance problems inherent to graph processing like irregular memory access patterns on traditional hardware (e.g., CPU).…

Hardware Architecture · Computer Science 2021-04-19 Jonas Dann , Daniel Ritter , Holger Fröning

Memory-augmented neural networks consisting of a neural controller and an external memory have shown potentials in long-term sequential learning. Current RAM-like memory models maintain memory accessing every timesteps, thus they do not…

Machine Learning · Computer Science 2019-03-21 Hung Le , Truyen Tran , Svetha Venkatesh

It is often said that one of the biggest limitations on computer performance is memory bandwidth (i.e."the memory wall problem"). In this position paper, I argue that if historical trends in computing evolution (where growth in available…

Operating Systems · Computer Science 2011-05-11 Niall Douglas

As a big data application, extreme multilabel classification has emerged as an important research topic with applications in ranking and recommendation of products and items. A scalable hybrid distributed and shared memory implementation of…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-12-21 Pawan Kumar
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