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Parameterizable machine learning (ML) accelerators are the product of recent breakthroughs in ML. To fully enable their design space exploration (DSE), we propose a physical-design-driven, learning-based prediction framework for…

With the rapid growth in the scale of pre-trained foundation models, parameter-efficient fine-tuning techniques have gained significant attention, among which Adapter Tuning is the most widely used. Despite achieving efficiency, it still…

Computer Vision and Pattern Recognition · Computer Science 2024-03-26 Qizhe Zhang , Bocheng Zou , Ruichuan An , Jiaming Liu , Shanghang Zhang

The data movement in large-scale computing facilities (from compute nodes to data nodes) is categorized as one of the major contributors to high cost and energy utilization. To tackle it, in-storage processing (ISP) within storage devices,…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-11-16 Hongsu Byun , Safdar Jamil , Jungwook Han , Sungyong Park , Myungcheol Lee , Changsoo Kim , Beongjun Choi , Youngjae Kim

The transition to electric transportation demands efficient and cost-effective powertrains. Optimizing energy use is crucial for extending range and reducing expenses. However, comparing inverter and motor efficiency based on inverter…

Systems and Control · Electrical Eng. & Systems 2025-07-08 Christoph Sachs , Fabian Stamer , Jan Allgeier , Duleepa Thrimawithana , Martin Neuburger

Large-scale subset selection asks for a small useful set of examples, features, sensors, seed users, or context passages from an enormous ground set. Submodular maximization is a canonical model for such diminishing-returns problems, but…

Data Structures and Algorithms · Computer Science 2026-05-07 Alan Kuhnle

Discrete optimization is a central problem in artificial intelligence. The optimization of the aggregated cost of a network of cost functions arises in a variety of problems including (W)CSP, DCOP, as well as optimization in stochastic…

Artificial Intelligence · Computer Science 2018-01-12 Ferdinando Fioretto , Enrico Pontelli , William Yeoh , Rina Dechter

Sparse Mixture-of-Experts (MoE) architectures have emerged as a promising approach to decoupling model capacity from computational cost. At the core of the MoE model is the router, which learns the underlying clustering structure of the…

Machine Learning · Computer Science 2026-04-21 Stefan K. Nielsen , Rachel S. Y. Teo , Laziz U. Abdullaev , Tan M. Nguyen

The growing computational demands of machine learning (ML) workloads have driven the design of ML accelerators aiming at an optimal tradeoff between efficiency and flexibility. A widely explored architecture for flexible ML accelerators is…

Hardware Architecture · Computer Science 2025-06-13 Luca Colagrande , Lorenzo Leone , Maximilian Coco , Andrei Deaconeasa , Luca Benini

Freight consolidation has significant potential to reduce transportation costs and mitigate congestion and pollution. An effective load consolidation plan relies on carefully chosen consolidation points to ensure alignment with existing…

Machine Learning · Computer Science 2025-04-15 Sikai Cheng , Amira Hijazi , Jeren Konak , Alan Erera , Pascal Van Hentenryck

Multiplication is arguably the most cost-dominant operation in modern deep neural networks (DNNs), limiting their achievable efficiency and thus more extensive deployment in resource-constrained applications. To tackle this limitation,…

Hardware Architecture · Computer Science 2022-12-20 Huihong Shi , Haoran You , Yang Zhao , Zhongfeng Wang , Yingyan Lin

Edge computing devices inherently face tight resource constraints, which is especially apparent when deploying Deep Neural Networks (DNN) with high memory and compute demands. FPGAs are commonly available in edge devices. Since these…

Hardware Architecture · Computer Science 2021-10-04 Jude Haris , Perry Gibson , José Cano , Nicolas Bohm Agostini , David Kaeli

Training large language models (LLMs) is known to be challenging because of the huge computational and memory capacity requirements. To address these issues, it is common to use a cluster of GPUs with 3D parallelism, which splits a model…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-05-29 Jinkyu Yim , Jaeyong Song , Yerim Choi , Jaebeen Lee , Jaewon Jung , Hongsun Jang , Jinho Lee

Hardware accelerators for neural networks have shown great promise for both performance and power. These accelerators are at their most efficient when optimized for a fixed functionality. But this inflexibility limits the longevity of the…

Hardware Architecture · Computer Science 2019-10-25 Ayoosh Bansal , Chance Coats , Evan Lissoos , Benjamin Schreiber

The exponential growth of AI has created unprecedented demand for computational resources, pushing chip designs to the limit while simultaneously escalating the environmental footprint of computing. As the industry transitions toward…

Hardware Architecture · Computer Science 2026-03-05 Chetan Choppali Sudarshan , Jiajun Hu , Aman Arora , Vidya A. Chhabria

Despite the demonstrated parameter efficiency of prompt-based fusion, its limited adaptivity and expressiveness hinder its effectiveness for multimodal applications at scale. In this paper, we present the first comprehensive study…

Machine Learning · Computer Science 2025-11-17 Ruixiang Jiang , Lingbo Liu , Changwen Chen

The boom in Large Language Models (LLMs) like GPT-4 and ChatGPT has marked a significant advancement in artificial intelligence. These models are becoming increasingly complex and powerful to train and serve. This growth in capabilities…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-12-27 Ekansh Agrawal , Xiangyu Sam Xu

Recently DRAM-based PIMs (processing-in-memories) with unmodified cell arrays have demonstrated impressive performance for accelerating AI applications. However, due to the very restrictive hardware constraints, PIM remains an accelerator…

Hardware Architecture · Computer Science 2023-10-17 Jaewoo Park , Sugil Lee , Jongeun Lee

Various processing-in-memory (PIM) accelerators based on various devices, micro-architectures, and interfaces have been proposed to accelerate deep neural networks (DNNs). How to deploy DNNs onto PIM-based accelerators is the key to explore…

Hardware Architecture · Computer Science 2024-11-15 Xiaotian Sun , Xinyu Wang , Wanqian Li , Yinhe Han , Xiaoming Chen

Reliable LiDAR panoptic segmentation (LPS), including both semantic and instance segmentation, is vital for many robotic applications, such as autonomous driving. This work proposes a new LPS framework named PANet to eliminate the…

Computer Vision and Pattern Recognition · Computer Science 2023-06-28 Jianbiao Mei , Yu Yang , Mengmeng Wang , Xiaojun Hou , Laijian Li , Yong Liu

Rapidly evolving artificial intelligence and machine learning applications require ever-increasing computational capabilities, while monolithic 2D design technologies approach their limits. Heterogeneous integration of smaller chiplets…